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UltraSynth: Integration of a CGRA into a Control Engineering Environment

  • Dennis WolfEmail author
  • Tajas Ruschke
  • Christian Hochberger
  • Andreas Engel
  • Andreas Koch
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 11444)

Abstract

Coarse Grained Reconfigurable Arrays (CGRAs) can exploit parallelism of compute-intense applications by distributing their workload across a set of Processing Elements (PEs). They are highly efficient in computation and flexible due to their reconfigurability. While these attributes make CGRAs highly interesting as general purpose hardware accelerators, their incorporation into a complete computing system raises severe challenges at the hardware and software level. To overcome the stage of a simulated concept, CGRAs need to be applied to the real-world in order to demonstrate the practicability of the overall system. This paper presents the integration of a CGRA into a control engineering environment targeting a Xilinx Zynq System on Chip (SoC). It focuses on the fully automated tool-chain mapping abstract engineering models to CGRA configurations, and on the SoC-internal runtime communication on hardware level.

Notes

Acknowledgements

This research was funded by the German Federal Ministry for Education and Research with the funding ID 01 IS 15020 and supported by iXtronics.

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Copyright information

© Springer Nature Switzerland AG 2019

Authors and Affiliations

  • Dennis Wolf
    • 1
    Email author
  • Tajas Ruschke
    • 1
  • Christian Hochberger
    • 1
  • Andreas Engel
    • 2
  • Andreas Koch
    • 2
  1. 1.Computer Systems Group (RS)TU DarmstadtDarmstadtGermany
  2. 2.Embedded Systems and Applications Group (ESA)TU DarmstadtDarmstadtGermany

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