Other topics of data path synthesis are treated in this chapter. For example, data path connectivity (buses), first-in first-out (FIFO) files, register files, arithmetic and logic unit (ALU), hierarchical description and sequential implementation (lower cost and longer time).
This is a preview of subscription content, log in to check access.
Deschamps JP, Sutter G, Cantó E (2012) Guide to FPGA Implementation of Arithmetic Functions. Springer, DordrechtGoogle Scholar
Deschamps JP, Valderrama E, Terés Ll (2017) Digital Systems: from Logic Gates to Processors. Springer, New YorkGoogle Scholar