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Towards Application-Centric Parallel Memories

  • Giulio StramondoEmail author
  • Cătălin Bogdan Ciobanu
  • Ana Lucia Varbanescu
  • Cees de Laat
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 11339)

Abstract

Many applications running on parallel processors and accelerators are bandwidth bound. In this work, we explore the benefits of parallel (scratch-pad) memories to further accelerate such applications. To this end, we propose a comprehensive approach to designing and implementing application-centric parallel memories based on the polymorphic memory-model called PolyMem. Our approach enables the acceleration of a memory-bound region of an application by (1) analyzing the memory access to extract parallel accesses, (2) configuring PolyMem to deliver maximum speed-up for the detected accesses, and (3) building an actual FPGA-based parallel-memory accelerator for this region, with predictable performance. We validate our approach on 10 instances of Sparse-STREAM (a STREAM benchmark adaptation with sparse memory accesses), for which we design and benchmark the corresponding parallel-memory accelerators in hardware. Our results demonstrate that building parallel-memory accelerators is feasible and leads to performance gain, but their efficient integration in heterogeneous platforms remains a challenge.

Keywords

Polymorphic parallel memory Memory bandwidth improvement Parallel-memory accelerator 

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Copyright information

© Springer Nature Switzerland AG 2019

Authors and Affiliations

  • Giulio Stramondo
    • 1
    Email author
  • Cătălin Bogdan Ciobanu
    • 1
  • Ana Lucia Varbanescu
    • 1
  • Cees de Laat
    • 1
  1. 1.University of AmsterdamAmsterdamThe Netherlands

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