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A Low-Power Compressive Sampling (CS) Photoplethysmogram (PPG) Readout with Embedded Feature Extraction

  • Venkata Rajesh Pamula
  • Chris Van Hoof
  • Marian Verhelst
Chapter
Part of the Analog Circuits and Signal Processing book series (ACSP)

Abstract

A compressive sampling (CS) photoplethysmogram (PPG) readout ASIC with embedded feature extraction to estimate heart rate (HR) directly from compressively sampled data is presented in this chapter. The ASIC incorporates a low-power analog front end (AFE), comprising of a transimpedance amplifier (TIA), switched integrator (SI), and a 12-bit successive approximation register (SAR) analog-to-digital converter (ADC) together with a digital back end (DBE) with embedded feature extraction unit (FEU) to estimate the average heart rate (HR) over a 4 s interval directly from compressively sampled PPG data. Trade-offs involved in TIA design for PPG readouts, in terms of stability, noise, and power consumption, are discussed in detail. The implemented ASIC supports uniform sampling mode (1 × compression) as well as CS modes with compression ratios of 8 ×, 10 ×, and 30 ×. Feature extraction to estimate the average HR is performed using least-squares spectral fitting through lomb-Scargle periodogram (LSP). The ASIC, implemented in a 0.18 μm CMOS process, consumes 172 μW of power from a 1.2 V supply while reducing the relative LED driver power consumption by up to 30 times without significant loss of relevant information for accurate HR estimation.

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Copyright information

© Springer Nature Switzerland AG 2019

Authors and Affiliations

  • Venkata Rajesh Pamula
    • 1
  • Chris Van Hoof
    • 1
  • Marian Verhelst
    • 2
  1. 1.imecLeuvenBelgium
  2. 2.KU Leuven ESAT-MICASLeuvenBelgium

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