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Hardware-Efficient Algorithm for 3D Spatial Rotation

  • Aleksandr CariowEmail author
  • Galina Cariowa
Conference paper
Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 889)

Abstract

In this paper, we have proposed a novel VLSI-oriented parallel algorithm for quaternion-based rotation in 3D space. The advantage of our algorithm is a reduction the number of multiplications through replacing part of them by less costly squarings. The algorithm uses Logan’s trick, which proposes to replace the calculation of the product of two numbers on summing the squares via the Binomial theorem. Replacing digital multipliers by squaring units implies reducing power consumption as well as decreases hardware circuit complexity.

Keywords

Quaternions Rotation matrix Fast algorithms 

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Copyright information

© Springer Nature Switzerland AG 2019

Authors and Affiliations

  1. 1.Faculty of Computer Science and Information TechnologyWest Pomeranian University of TechnologySzczecinPoland

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