Comparison of Reconfiguration Schemes for Defect Tolerant Mesh Arrays
A large number of reconfiguration schemes have been presented for defect tolerant mesh arrays. Here a number of such schemes will be compared. Area and speed based measures are presented, along with a summary of the methods required to estimate area overhead, processor utilization, yield and speed.
KeywordsSystolic Array Area Overhead Kerf Width Transmission Gate Channel Scheme
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