Fault-Free or Fault-Tolerant VLSI Manufacture

  • C. H. Stapper

Abstract

A dichotomy affects the approach to the manufacture of integrated circuits. Some manufacturers aim for “zero defects,” while others are deeply involved in using circuits with fault-tolerance. For either approach, future manufacturing facilities require extensive defect learning. The methodology for establishing defect learning objectives far into the future is the topic of this paper.

Keywords

Defect Density Critical Area Chip Area Storage Node Triple Modular Redundancy 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media New York 1990

Authors and Affiliations

  • C. H. Stapper
    • 1
  1. 1.IBMEssex JunctionUSA

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