Behavioral and Transaction Level Modeling

  • Stuart Sutherland
  • Simon Davidmann
  • Peter Flake

Abstract

This chapter defines Transaction Level Modeling (TLM) as an adjunct to behavioral modeling. The chapter explains how TLM can be used, and shows how SystemVerilog is suited to TLM.

Keywords

Register Transfer Level Transaction Level Memory Subsystem Executable Specification Transaction Level Modeling 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media Dordrecht 2004

Authors and Affiliations

  • Stuart Sutherland
  • Simon Davidmann
  • Peter Flake

There are no affiliations available

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