Single-Loop Multi-Bit Sigma-Delta Modulators

  • Yves Geerts
  • Michiel Steyaert
  • Willy Sansen
Chapter

Abstract

ΔΣ converters are suitable to implement high-performance analog-to-digital converters. Several topologies are first reviewed in the context of high-resolution high-speed design targets. The advantages of multi-bit topologies are revealed and several solutions for the linearity requirements of the feedback DAC are discussed. The remainder of this chapter focuses on the influence of several important circuit non-idealities which can become performance limiting factors. A 16-bit 2.5 MS/s converter is discussed as a design example.

Keywords

Switch Resistance Sampling Capacitance Unit Capacitor Dynamic Element Match Data Weight Average 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media New York 2003

Authors and Affiliations

  • Yves Geerts
  • Michiel Steyaert
  • Willy Sansen

There are no affiliations available

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