Design Methodologies for analog IP

  • J. Vandenbussche
  • G. Gielen
  • M. Steyaert
Part of the The Kluwer International Series in Engineering and Computer Science book series (SECS, volume 738)

Abstract

In this chapter a design methodology for analog IP is deduced. After a short reflection on how analog design is performed, the proper terminology is introduced. A definition for analog synthesis is given; requirements and goals complete the definition. An overview is given on recently developed synthesis frameworks like the Amgie framework [PLAS 01a,PLAS 01b] that was used to develop the PDFE front-end presented in Chapter 3. As stated in the previous chapter, synthesis is not a feasible approach for star IP. Therefore a methodology suited for star IP is presented at the end of this chapter on design methodologies. The presented methodology was used to design the high-accuracy current-steering D/A converters, presented in Chapter 4, and the high-speed A/D converter presented in Chapter 5.

Keywords

Design Methodology Analog Circuit Analog Design Function Block Layout Generation 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media New York 2003

Authors and Affiliations

  • J. Vandenbussche
    • 1
  • G. Gielen
    • 2
  • M. Steyaert
    • 2
  1. 1.AnSem N. V.Belgium
  2. 2.K.U. LeuvenBelgium

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