Layout Driven Synthesis

Abstract

While BDDs often provide a compact representation of Boolean functions, their layout is not much simpler as that of “traditionally” designed circuits, making placement and routing a difficult task. As one alternative lattice diagrams have been proposed. The number of nodes at each level is linear which makes the diagram fit onto a two dimensional structure, such overcoming the routing problem. In the case of totally symmetric functions it is known that e.g. BDDs form such lattice structures. Unfortunately, totally symmetric functions are rare, and we need a way to make functions “pseudo-symmetric” in order to derive lattice structures. This can be done by re-introducing support variables in similar fashion to the variable repetition of Universal Akers Arrays [Ake72]. Akers’ method, always considering worst case functions, was shown to render exponential lattice depth and was therefore considered infeasible.