A Method for Interface Customization of Soft IP Cores

  • Robert Siegmund
  • Dietmar Müller
Chapter

Abstract

In this chapter, we present an interface customization technique suitable for Soft IP cores, which are to be implemented as synthesizable VHDL models. By exploiting the features of VHDL+, an extension to VHDL, we separate the specifications of the IP functional behavior and IP interface protocols into two distinct IP design units. Interface customization is done through specification of system specific IP interface communication protocols, followed by an IP interface generation at signal level with our tool MODIS.

Keywords

Interface Specification Interface Signal VHDL Code Maximum Clock Frequency Module Port 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media Dordrecht 2001

Authors and Affiliations

  • Robert Siegmund
    • 1
  • Dietmar Müller
    • 1
  1. 1.Chemnitz University of TechnologyChemnitzGermany

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