Design and Optimization of RFCMOS-Circuits for Integrated PLL’s and Synthesizers
Voltage controlled oscillators and prescalers are critical high speed building blocks in RFsynthesizers and PLL’s. For wireless applications, major VCO-design criteria are low voltage, low power, low phasenoise, wide and/or linear tunability and small area. Primary key to LC-VCO optimization is optimal LC-tank design. 0.35jum CMOS VCO designs, fulfilling GSM and DECT phasenoise requirments, are presented. Solutions to generate quadrature outputs are discussed. Main prescaler design goal is low power and low voltage design. Multi modulus prescalers using dynamic CMOS flipflops can be used for minimal power consumption. Finally some mixed-mode aspects of RFCMOS circuit design for single-chip RF synthesizers and PLL’s are discussed.
KeywordsVoltage Control Oscillator Flicker Noise Loop Filter Minimal Power Consumption Linear Tunability
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