High-Performance Memory Systems

  • Amos R. Omondi
Chapter

Abstract

A high-performance pipelined machine requires a memory system of equally high performance if the processor is to be fully utilized. This chapter deals with the issue of matching processor and memory performances. In a simple machine in which a single main memory module is connected directly to a processor (with no intermediate storage), the effective rate at which operands and instructions can be processed is limited by the rate at which the memory unit can deliver them. But in a high-performance machine, the access time of a single main memory unit typically exceeds the cycle time of the processor by a large margin, and obtaining the highest performance possible requires some changes in the basic design of the memory system. The development of faster memory as a solution to problem is not viable due to limitations in the technology that is available within a given period: the performance of the technology used for main memories typically improves at a rate that is less than that used processors, and the use for main memory of the fastest available logic is never cost-effective.

Keywords

Main Memory Memory Location Cache Line Memory Bank Instruction Cache 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media New York 1999

Authors and Affiliations

  • Amos R. Omondi
    • 1
  1. 1.Department of Computer ScienceFlinders UniversityAdelaideAustralia

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