Target Architectures

  • Rolf Ernst
Chapter

Abstract

This chapter surveys the architectures of CPUs frequently used in modern embedded computing systems. It is legitimate to ask why target architectures should be a co-design problem when computer architecture and VLSI design have been taught at universities for decades and are, therefore, widely known in the CAD and system design communities. Throughout this chapter, however, we will see a large variety of co-design target architectures which substantially differ from the general-purpose RISC architectures that are familiar to students today, but are of the same economic importance. We will define a set of orthogonal specialization techniques as a framework to explain the design process which leads to the observed variety. A number of examples from different application areas will support our findings. While in this chapter the set of specialization techniques is primarily used to understand and to teach target architecture design, it shall also serve as a basis for future work in target system synthesis.

Keywords

Digital Signal Processor Pulse Width Modulation Digital Signal Processor Address Space Memory Architecture 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media Dordrecht 1997

Authors and Affiliations

  • Rolf Ernst
    • 1
  1. 1.Institut für DatenverarbeitungsanlagenTechnische Universität BraunschweigBraunschweigGermany

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