To realize a discrete-time filter with either computer software, a programmable DSP chip, or custom VLSI, a network must be specified describing the computations to be performed. For software realizations, the network corresponds to a flowchart of the filter algorithm, while for hardware realizations, the network describes the actual circuit elements and their interconnection. Many important properties of the discrete-time filter are placed in evidence by the coefficients of certain network structures. Significant computational savings can also be achieved in many cases by the proper choice of the network. And finally, the performance of a digital implementation is affected very substantially by the choice of the network structure because of the quantization effects we will study in chapter 11.
KeywordsGroup Delay Parallel Form Magnitude Response Direct Form Comb Filter
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