Integrated Circuits for Video Coders

  • Vasudev Bhaskaran
  • Konstantinos Konstantinides
Part of the The Springer International Series in Engineering and Computer Science book series (SECS, volume 334)

Abstract

Due the computational requirements of the video standards (H.261 and MPEG), early hardware implementations were multichip designs, where each major component such as the DCT processor and the variable-length coder was a separate chip. For example, in 1992, NEC introduced a three-chip set for MPEG-1 video encoding and decoding. The three ICs were an interframe coder (required only for video encoding), a transform and quantization processor, and a variable-length coder. Operating at 27 MHz, the chip set could process SIF resolution frames at 30 frames/s.

Keywords

Motion Estimation Video Coder Video Encoder Instruction Cache Video Decoder 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media New York 1995

Authors and Affiliations

  • Vasudev Bhaskaran
    • 1
  • Konstantinos Konstantinides
    • 1
  1. 1.Hewlett-Packard LaboratoriesUSA

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