Scheduling

  • Jan Vanhoof
  • Karl Van Rompaey
  • Ivo Bolsens
  • Gert Goossens
  • Hugo De Man
Chapter
Part of the The Springer International Series in Engineering and Computer Science book series (SECS, volume 216)

Abstract

The goal of scheduling is to map the register transfers in the low-level signal flow graph g into discrete time slots, called control steps. The graph g is engrafted upon a particular data path configuration and contains primitive operations only. The amount of parallelism in the data path is used as a constraint to convert the applicative, maximally parallel signal-flow graph into a procedural description with a proper sequence of the register transfers, i.e., the schedule.

Keywords

Schedule Algorithm Code Block Graph Transformation Data Path Control Step 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media Dordrecht 1993

Authors and Affiliations

  • Jan Vanhoof
    • 1
  • Karl Van Rompaey
    • 1
  • Ivo Bolsens
    • 1
  • Gert Goossens
    • 1
  • Hugo De Man
    • 1
  1. 1.IMEC vzwUSA

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