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An Architecture Framework for Introducing Predicated Execution into Embedded Microprocessors

  • Daniel A. Connors
  • David I. August
  • Kevin M. Crozier
  • andWen-mei W. Hwu
  • Jean-Michel Puiatti
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1685)

Abstract

Growing demand for high performance in embedded systems is creating new opportunities for Instruction-Level Parallelism (ILP) techniques that are traditionally used in high performance systems. Predicated execution, an important ILP technique, can be used to improve branch handling, reduce frequently mispredicted branches, and expose multiple execution paths to hardware resources. However, there is a major tradeoff in the design of the instruction set, the addition of a predicate operand for all instructions. We propose a new architecture framework for introducing predicated execution to embedded designs. Experimental results show a 10% performance improvement and a code reduction of 25% over a traditionally predicated architecture.

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Copyright information

© Springer-Verlag Berlin Heidelberg 1999

Authors and Affiliations

  • Daniel A. Connors
    • 1
  • David I. August
    • 1
  • Kevin M. Crozier
    • 1
  • andWen-mei W. Hwu
    • 1
  • Jean-Michel Puiatti
    • 2
  1. 1.Department of Electrical and Computer Engineering, The Coordinated Science LaboratoryUniversity of IllinoisIllinoisUSA
  2. 2.Logic Systems Laboratory (DI-LSL)Swiss Federal Institute of Technology LausanneLausanneSwitzerland

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