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Annotated Memory References: A Mechanism for Informed Cache Management

  • Alvin R. Lebeck
  • David R. Raymond
  • Chia-Lin Yang
  • Mithuna S. Thottethodi
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1685)

Abstract

As the importance of cache performance increases, allowing software to assist in cache management decisions becomes an attractive alternative. This paper focuses primarily on a mechanism for software to convey information to the memory hierarchy. We introduce a single instruction—called TAG—that can annotate subsequent memory references with a number of bits, thus avoiding major modifications to the instruction set. Simulation results show that annotating all memory reference instructions in the SPEC95 benchmarks increases execution time between 0% and 2% for both statically and dynamically scheduleded processors. We show that exposing cache management mechanisms to software can decrease the execution time of three media benchmarks (epic, pegwit, ijpeg) between 11% and 17% speedups on a 4-issue dynamically scheduled processor.

Keywords

Execution Time Memory Reference Memory Hierarchy Single Instruction Cache Replacement 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

References

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Copyright information

© Springer-Verlag Berlin Heidelberg 1999

Authors and Affiliations

  • Alvin R. Lebeck
    • 1
  • David R. Raymond
    • 1
  • Chia-Lin Yang
    • 1
  • Mithuna S. Thottethodi
    • 1
  1. 1.Department of Computer ScienceDuke UniversityDurhamUSA

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