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Efficient Sorting Using Registers and Caches

  • Lars Arge
  • Jeff Chase
  • Jeffrey S. Vitter
  • Rajiv Wickremesinghe
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1982)

Abstract

Modern computer systems have increasingly complex memory systems. Common machine models for algorithm analysis do not reflect many of the features of these systems, e.g., large register sets, lockup-free caches, cache hierarchies, associativity, cache line fetching, and streaming behavior. Inadequate models lead to poor algorithmic choices and an incomplete understanding of algorithm behavior on real machines.

A key step toward developing better models is to quantify the performance effects of features not reflected in the models. This paper explores the effect of memory system features on sorting performance. We introduce a new cache-conscious sorting algorithm, R-merge, which achieves better performance in practice over algorithms that are theoretically superior under the models. R-merge is designed to minimize memory stall cycles rather than cache misses, considering features common to many system designs.

Keywords

Memory System Main Memory Cache Line Memory Hierarchy Cache Performance 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2001

Authors and Affiliations

  • Lars Arge
    • 1
  • Jeff Chase
    • 1
  • Jeffrey S. Vitter
    • 1
  • Rajiv Wickremesinghe
    • 1
  1. 1.Department of Computer ScienceDuke UniversityDurham, NCUSA

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