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A Heuristic Qubit Placement Strategy for Nearest Neighbor Realization in 2D Architecture

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VLSI Design and Test (VDAT 2018)

Part of the book series: Communications in Computer and Information Science ((CCIS,volume 892))

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Abstract

Recently, quantum computing has received massive attention of the researchers due to the advantages it offers in solving some problems efficiently compared to conventional computing. But there are several design challenges that need to be satisfied for various quantum technologies to perform reliable quantum operation. One such essential requirement demands to maintain the neighborhood organization of the operating qubits, referred to as the nearest neighbor (NN) constraint. This can be settled through insertion of SWAP gates which helps to synthesize a NN-compliant design by exchanging the positions of the qubits. Consequently, the cost overhead of the circuit enhances due to SWAP gate insertion as the number of gates in the circuit increases, thereby exploitation of various approaches to address this issue has turned out to be essential of late.

In this regard, here we have introduced an improved heuristic design approach for the synthesis of a two dimensional NN-compliant circuit with reduced cost overhead. The approach has been executed in three phases of qubit selection, qubit placement and SWAP gate insertion. Initially, the qubits have been chosen for placement based on some cost metric estimation and then organized them on the grid locations in a specific order in the second phase. Lastly, SWAP gate insertion phase has been exercised to make qubits adjacent. It has been observed that our method has performed comparatively better than the previous works after carrying out experimental evaluations over a wide range of benchmark specifications.

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Correspondence to Chandan Bandyopadhyay .

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Bhattacharjee, A., Bandyopadhyay, C., Biswal, L., Rahaman, H. (2019). A Heuristic Qubit Placement Strategy for Nearest Neighbor Realization in 2D Architecture. In: Rajaram, S., Balamurugan, N., Gracia Nirmala Rani, D., Singh, V. (eds) VLSI Design and Test. VDAT 2018. Communications in Computer and Information Science, vol 892. Springer, Singapore. https://doi.org/10.1007/978-981-13-5950-7_49

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  • DOI: https://doi.org/10.1007/978-981-13-5950-7_49

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  • Online ISBN: 978-981-13-5950-7

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