Abstract
Moving towards micrometre scale to nanometre scale device shrinks down emerging nanometre technology such as quantum-dot cellular automata as a nesting success. The introduced architecture is robust where the explicit design of full adder and full subtraction uses for Ex-OR design. A new architecture of Ex-OR based on one majority gate is proposed, which its most optimized architecture and its placement of cells from the novel design. The analysis based on simulation showed that the introduced Ex-OR and full adder makes only 11 and 46 cells count, respectively. In proposed Ex-OR design, first output is received with no any latency which can be a suitable design for implementation of the high-speed full adder design. In addition, power estimation results are obtained after simulation of proposed designs in QCAPro tool. Therefore, the novel designs improve the energy dissipation parameters such as mean leakage energy dissipation, mean switching energy dissipation and total energy dissipation 75, 11.28 and 82.19% in comparison with the most robust design in existing.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Lent, C. S., Tougaw, P. D., Porod, W., & Bernstein, G. H. (1993). Quantum cellular automata. Nanotechnology., 4, 49–57.
Orlov, A. O., Amlani, I., Bernstein, G. H., Lent, C. S., & Snider, G. L. (1997). Realization of a functional cell for quantum-dot cellular automata. Science, 277, 928–930.
Tougaw, P. D., & Lent, C. S. (1994). Logical devices implemented using quantum cellular automata. Journal of Applied Physics, 75(3), 1818–1825.
Lent, C. S., & Tougaw, P. D. (1997). A device architecture for computing with quantum dots. Proceedings of the IEEE, 85(4), 541–557.
Bhoi, B. K., Misra, N. K., & Pradhan M. (2018). Novel robust design for reversible code converters and binary incrementer with quantum-dot cellular automata. In S. Bhalla, V. Bhateja, A. Chandavale, A. Hiwale, & S. Satapathy (Eds.), Intelligent computing and information and communication. Advances in intelligent systems and computing (Vol 673). Singapore: Springer.
Walus, K., Dysart, T. J., Jullien, G., & Budiman, A. R. (2004). QCADesigner: A rapid design and simulation tool for quantum-dot cellular automata. IEEE Transactions on Nanotechnology, 3(1), 26–31.
Ramesh, B. & Rani, M. A. (2016). Implementation of parallel adders using area efficient quantum dot cellular automata full adder. In 2016 10th International Conference on Intelligent Systems and Control (ISCO), (pp. 1–5). IEEE.
Taherkhani, E., Moaiyeri, M. H., & Angizi, S. (2017). Design of an ultra-efficient reversible full adder-subtractor in quantum-dot cellular automata. Optik-International Journal for Light and Electron Optics, 142, 557–563.
Sonare, N., & Meena, S. (2016). A robust design of coplanar full adder and 4-bit Ripple Carry adder using quantum-dot cellular automata. In IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT), May 2016 (pp. 1860–1863). IEEE.
Hanninen, I., & Takala, J.: Robust adders based on quantum-dot cellular automata. In 2007 IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP. (pp. 391–396). IEEE, July 2007.
Wang, W., Walus, K., & Jullien, G. A.: Quantum-dot cellular automata adders. In 2003 Third IEEE Conference on Nanotechnology. IEEE-NANO 2003, August 2003 (Vol. 1, pp. 461–464). IEEE.
Bishnoi, B., Giridhar, M., Ghosh, B. & Nagaraju, M. (2012). Ripple carry adder using five input majority gates. In 2012 IEEE International Conference on Electron Devices and Solid State Circuit (EDSSC), December 2012, (pp. 1–4). IEEE.
Chudasama, A., & Sasamal, T. N. (2016). Implementation of 4 × 4 vedic multiplier using carry save adder in quantum-dot cellular automata. In 2016 International Conference on Communication and Signal Processing (ICCSP), April 2016 (pp. 1260–1264). IEEE.
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2019 Springer Nature Singapore Pte Ltd.
About this paper
Cite this paper
Bhoi, B.K., Das, T., Misra, N.K., Rout, R. (2019). An Explicit Cell-Based Nesting Robust Architecture and Analysis of Full Adder. In: Khare, A., Tiwary, U., Sethi, I., Singh, N. (eds) Recent Trends in Communication, Computing, and Electronics. Lecture Notes in Electrical Engineering, vol 524. Springer, Singapore. https://doi.org/10.1007/978-981-13-2685-1_52
Download citation
DOI: https://doi.org/10.1007/978-981-13-2685-1_52
Published:
Publisher Name: Springer, Singapore
Print ISBN: 978-981-13-2684-4
Online ISBN: 978-981-13-2685-1
eBook Packages: EngineeringEngineering (R0)