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International Conference on Field Programmable Logic and Applications

FPL 2003: Field Programmable Logic and Application pp 71–80Cite as

Inter-processor Connection Reconfiguration Based on Dynamic Look-Ahead Control of Multiple Crossbar Switches

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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2778))

Abstract

A parallel system architecture for program execution based on the look-ahead dynamic reconfiguration of inter-processor connections is discussed in the paper. The architecture is based on inter-processor connection reconfiguration in multiple crossbar switches that are used for parallel program execution. Programs are structured into sections that use fixed inter-processor connections for communication. The look-ahead dynamic reconfiguration assumes that while some inter-processor connections in crossbar switches are used for current section execution, other connections are in advance configured for execution of further sections. Programs have to be decomposed into sections for given time parameters of reconfiguration control, so, as to avoid program execution delays due to connection reconfiguration. Automatic program structuring is proposed based on the analysis of parallel program graphs. The structuring algorithm finds the partition into sections that minimizes the execution time of a program executed with the look-ahead created connections. The program execution time is evaluated by simulated program graph execution with reconfiguration control modeled as an extension of the basic program graph.

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References

  1. Muntean, T.: SUPERNODE, Architecture Parallele Dynamiquement Reconfigurable de Transputers, 11-emes Journees sur l’Informatique, Nancy (Janvier 1989)

    Google Scholar 

  2. Bauch, A., Braam, R., Maehle, E.: DAMP - A Dynamic Reconfigurable Multiprocessor System With a Distributed Switching Network. In: 2nd European Conf. on Distributed Memory Computing, Munich, April 22-24, pp. 495–504 (1991)

    Google Scholar 

  3. Tudruj, M.: Connection by Communication” Paradigm for Dynamically Reconfigurable Multi-Processor Systems. In: Proceedings of the PARELEC 2000, Trois Rivieres, Canada, pp. 74–78. IEEE CS Press, Los Alamitos (2000)

    Google Scholar 

  4. Tudruj, M.: Embedded Cluster Computing Through Dynamic Reconfigurability of Inter-Processor Connections. In: Grigoras, D., Nicolau, A., Toursel, B., Folliot, B. (eds.) IWCC 2001. LNCS, vol. 2326, p. 77. Springer, Heidelberg (2002)

    Chapter  Google Scholar 

  5. Tudruj, M.: Multi-transputer architectures with the look-ahead dynamic link connection reconfiguration. In: World Transputer Congress 1995, Harrogate (September 1995)

    Google Scholar 

  6. Tudruj, M.: Look-Ahead Dynamic Reconfiguration of Link Connections in Multi-Processor Architectures. In: Parallel Computing 1995, Gent, pp. 539–546 (September 1995)

    Google Scholar 

  7. Tudruj, M., Pasquier, O., Calvez, J.P.: Fine-grained process synchronization in multiprocessors with the look-ahead inter-processor connection setting. In: Proc. of 22nd Euromicro Conference: Short Contributions, Prague, IEEE CS, Los Alamitos (1996)

    Google Scholar 

  8. Hwang, J.-J., Chow, Y.-C., Angers, F.D., Lee, C.-Y.: Scheduling Precedence Graphs in Systems with Inter-processor Communication Times. Siam J. Comput. 18(2), 244–257 (1989)

    Article  MathSciNet  Google Scholar 

  9. Laskowski, E.: Program Graph Scheduling in the Look-Ahead Reconfigurable Multiprocessor System. In: Proceedings of the PARELEC 2000, Trois Rivieres, Canada, pp. 106–110. IEEE CS Press, Los Alamitos (2000)

    Google Scholar 

  10. Laskowski, E.: New Program Structuring Heuristics for Multi-Processor Systems with Redundant Communication Resources. In: Proc. of the PARELEC 2002, Warsaw, Poland, pp. 183–188. IEEE CS Press, Los Alamitos (2002)

    Google Scholar 

  11. Wilkinson, B., Allen, M.: Parallel Programming, Techniques and Applications Using Networked Workstations and Parallel Computers, p. 327. Prentice Hall, Englewood Cliffs (1999)

    Google Scholar 

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Author information

Authors and Affiliations

  1. Institute of Computer Science, Polish Academy of Sciences, ul. Ordona 21, 01-237, Warsaw, Poland

    Eryk Laskowski & Marek Tudruj

  2. Polish-Japanese Institute of Information Technology, ul. Koszykowa 86, 02-008, Warsaw, Poland

    Marek Tudruj

Authors
  1. Eryk Laskowski
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  2. Marek Tudruj
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Editor information

Editors and Affiliations

  1. Department of Electrical and Electronic Engineering, Imperial College London, Exhibition Road, SW7 2BT, London, UK

    Peter Y. K. Cheung

  2. Department of Electrical & Electronic Engineering, Imperial College London, Exhibition Road, SW7 2BT, London, UK

    George A. Constantinides

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© 2003 Springer-Verlag Berlin Heidelberg

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Laskowski, E., Tudruj, M. (2003). Inter-processor Connection Reconfiguration Based on Dynamic Look-Ahead Control of Multiple Crossbar Switches. In: Y. K. Cheung, P., Constantinides, G.A. (eds) Field Programmable Logic and Application. FPL 2003. Lecture Notes in Computer Science, vol 2778. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-45234-8_8

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  • DOI: https://doi.org/10.1007/978-3-540-45234-8_8

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-40822-2

  • Online ISBN: 978-3-540-45234-8

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