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Core-Based Reusable Architecture for Slave Circuits with Extensive Data Exchange Requirements

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Book cover Field Programmable Logic and Application (FPL 2003)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2778))

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Abstract

Many digital circuit’s functionality is strongly dependant on high speed data exchange between data source and sink elements. In order to alleviate the main processor’s work, it is usually interesting to isolate high speed data exchange from all other control tasks. A generic architecture, based on configurable cores, has been achieved for slave circuits controlled by an external host and with extensive data exchange requirements. Design reuse has been improved by means of a software application that helps on configuration and simulation tasks. Two applications implemented on FPGA technology are presented to validate the proposed architecture.

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© 2003 Springer-Verlag Berlin Heidelberg

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Bidarte, U., Astarloa, A., Zuloaga, A., Jimenez, J., Martínez de Alegría, I. (2003). Core-Based Reusable Architecture for Slave Circuits with Extensive Data Exchange Requirements. In: Y. K. Cheung, P., Constantinides, G.A. (eds) Field Programmable Logic and Application. FPL 2003. Lecture Notes in Computer Science, vol 2778. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-45234-8_49

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  • DOI: https://doi.org/10.1007/978-3-540-45234-8_49

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-40822-2

  • Online ISBN: 978-3-540-45234-8

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