Abstract
This paper proposes modifications to standard island-style FPGAs that provide interconnect capable of scaling at the same rate as typical netlists, unlike traditionally tiled FPGAs. The proposal uses a logical third and fourth dimensions to create increasing wire density for increasing logic capacity. The additional dimensions are mapped to standard two-dimensional silicon. This innovation will increase the longevity of a given cell architecture, and reduce the cost of hardware, CAD tool and Intellectual Property (IP) redesign. In addition, extra-dimensional FPGA architectures provide a conceptual unification of standard FPGAs and time-multiplexed FPGAs.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Alexander, M.J., Cohoon, J.P., Colflesh, J.L., Karro, J., Robins, G.: Threedimensional field-programmable gate arrays. In: Proceedings of the IEEE International ASIC Conference, pp. 253–256 (September 1995)
Alexander, M.J., Cohoon, J.P., Karro, J., Colflesh, J.L., Peters, E.L., Robins, G.: Placement and routing for three-dimensional FPGAs. In: 4th Canadian Workshop on Field-Programmable Devices, Toronto, Canada, May 1996, pp. 11–18 (1996)
Betz, V., Rose, J.: Effect of the prefabricated routing track distribution on FPGA area efficiency. IEEE Transactions on VLSI Systems 6(3), 445–456 (1998)
Cheng, C.E.: RISA: Accurate and efficient placement routability modeling. In: Proceedings of IEEE/ACM International Conference on CAD (ICCAD), November 1996, pp. 690–695 (1996)
DeHon, A.: DPGA-coupled microprocessors: Commodity ICs for the early 21st century. In: Buell, D.A., Pocek, K.L. (eds.) Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, Napa, CA, April 1994, pp. 31–39 (1994)
Depreitere, J., Neefs, H., Van Marck, H., Van Campenhout, J., Baets, R., Dhoedt, B., Thienpont, H., Veretennicoff, I.: An optoelectronic 3-D field programmable gate array. In: Hartenstein, R.W., Servit, M.Z. (eds.) FPL 1994. LNCS, vol. 849, pp. 352–360. Springer, Heidelberg (1994)
Donath, W.E.: Placement and average interconnection lengths of computer logic. IEEE Transactions on Circuits and Systems, 272–277 (April 1979)
Fan, H., Liu, J., Wu, Y.-L.: General models for optimum arbitrary-dimension fpga switch box designs. In: Proceedings of IEEE/ACM International Conference on CAD (ICCAD), November 2000, pp. 93–98 (2000)
El Gamal, A.: Two-dimensional stochastic model for interconnections in master slice integrated circuits. IEEE Transactions on Circuits and Systems 28(2), 127–138 (1981)
Hutton, M., Grossman, J.P., Rose, J., Corneil, D.: Characterization and parameterized random generation of digital circuits. In: Proceedings of the 33rd ACM/SIGDA Design Automation Conference (DAC), Las Vegas, NV, June 1996, pp. 94–99 (1996)
Hutton, M., Rose, J., Corneil, D.: Generation of synthetic sequential benchmark circuits. In: 5th ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA 1997) (February 1997)
Landman, B.S., Russo, R.L.: On pin versus block relationship for partions of logic circuits. IEEE Transactions on Computers C-20, 1469–1479 (1971)
Leeser, M., Meleis, W.M., Vai, M.M., Xu, W., Chiricescu, S., Zavracky, P.M.: Rothko: A three-dimensional FPGA. IEEE Design and Test of Computers 15(1), 16–23 (1998)
Meleis, W.M., Leeser, M., Zavracky, P., Vai, M.M.: Architectural design of a three dimensional FPGA. In: Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI), September 1997, pp. 256–268 (1997)
Scalera, S., Vazquez, J.R.: The design and implementation of a context switching FPGA. In: Buell, D.A., Pocek, K.L. (eds.) Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, Napa, CA, April 1998, pp. 78–85 (1998)
Trimberger, S.: Scheduling designs into a time-multiplexed FPGA. In: 6th ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA 1998), pp. 153–160 (February 1998)
Trimberger, S., Carberry, D., Johnson, A., Wong, J.: A time-multiplexed FPGA. In: Arnold, J., Pocek, K.L. (eds.) Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, Napa, CA, April 1997, pp. 22–28 (1997)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2003 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Schmit, H. (2003). Extra-dimensional Island-Style FPGAs. In: Y. K. Cheung, P., Constantinides, G.A. (eds) Field Programmable Logic and Application. FPL 2003. Lecture Notes in Computer Science, vol 2778. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-45234-8_40
Download citation
DOI: https://doi.org/10.1007/978-3-540-45234-8_40
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-40822-2
Online ISBN: 978-3-540-45234-8
eBook Packages: Springer Book Archive