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Secure Multiplication for Bitslice Higher-Order Masking: Optimisation and Comparison

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Constructive Side-Channel Analysis and Secure Design (COSADE 2018)

Part of the book series: Lecture Notes in Computer Science ((LNSC,volume 10815))

Abstract

In this paper, we optimize the performances and compare several recent masking schemes in bitslice on 32-bit arm devices, with a focus on multiplication. Our main conclusion is that efficiency (or randomness) gains always come at a cost, either in terms of composability or in terms of resistance against horizontal attacks. Our evaluations should therefore allow a designer to select a masking scheme based on implementation constraints and security requirements. They also highlight the increasing feasibility of (very) high-order masking that are offered by increasingly powerful embedded devices, with new opportunities of high-security devices in various contexts.

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Acknowledgments

This work has been funded in part by the European Commission and the Walloon Region through the FEDER project USERMedia (convention number 501907-379156) and by the INNOVIRIS project SCAUT. François-Xavier Standaert is a research associate of the Belgian Fund for Scientific Research.

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Correspondence to Dahmun Goudarzi or Anthony Journault .

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Goudarzi, D., Journault, A., Rivain, M., Standaert, FX. (2018). Secure Multiplication for Bitslice Higher-Order Masking: Optimisation and Comparison. In: Fan, J., Gierlichs, B. (eds) Constructive Side-Channel Analysis and Secure Design. COSADE 2018. Lecture Notes in Computer Science(), vol 10815. Springer, Cham. https://doi.org/10.1007/978-3-319-89641-0_1

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  • DOI: https://doi.org/10.1007/978-3-319-89641-0_1

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