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A Hardware Trojan Detection Method Design Based on TensorFlow

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Part of the book series: Lecture Notes in Computer Science ((LNISA,volume 11910))

Abstract

As an extra circuit inserted into chip design, Hardware Trojan can achieve malicious functional changes, reliability reduction or secret information disclosure. Meanwhile, the design of the hardware Trojan circuit is concealed, triggered only under rare conditions, and is in a waiting state for most of the life cycle. It is quite small compared to the host design and has little influence on circuit parameters. Therefore, it is difficult to detect hardware Trojans. Fast and accurate detection technology is provided by Google’s open source machine learning framework TensorFlow. The hardware Trojan circuit adopts the standard circuit provided by Trust-Hub. It is realized through FPGA programming. ISE is used for compiling and simulation to obtain the characteristic value of the circuit; Finally, a hardware Trojan detection platform based on machine learning is established by simulating the data via TensorFlow machine learning. The experimental test results verify the correctness of the design and provide a simple hardware Trojan detection for IC.

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Correspondence to Wenzhi Wu .

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Wu, W., Wei, Y., Ye, R. (2019). A Hardware Trojan Detection Method Design Based on TensorFlow. In: Qiu, M. (eds) Smart Computing and Communication. SmartCom 2019. Lecture Notes in Computer Science(), vol 11910. Springer, Cham. https://doi.org/10.1007/978-3-030-34139-8_24

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  • DOI: https://doi.org/10.1007/978-3-030-34139-8_24

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-030-34138-1

  • Online ISBN: 978-3-030-34139-8

  • eBook Packages: Computer ScienceComputer Science (R0)

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