Abstract
This chapter presents the fundamental concepts to understand the remaining of this book. Therefore, in Sect. 2.1, we first discuss the concepts of parallel programming, as well as the communication models and parallel programming interfaces widely used nowadays. Also, this section highlights the main characteristics of the multicore architectures regarding the exploitation of thread-level parallelism. Then, Sect. 2.2 presents the techniques used to optimize the power and energy consumption. Finally, Sect. 4.1 discusses the design space exploration of these approaches.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Buono, D., Matteis, T.D., Mencagli, G., Vanneschi, M.: Optimizing message-passing on multicore architectures using hardware multi-threading. In: 2014 22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, pp. 262–270. ACM, New York (2014). https://doi.org/10.1109/PDP.2014.63
Butenhof, D.R.: Programming with POSIX Threads. Addison-Wesley Longman Publishing, Boston (1997)
Chandramowlishwaran, A., Knobe, K., Vuduc, R.: Performance evaluation of concurrent collections on high-performance multicore computing systems. In: 2010 IEEE International Symposium on Parallel Distributed Processing (IPDPS), pp. 1–12. IEEE, Piscataway (2010). https://doi.org/10.1109/IPDPS.2010.5470404
Chapman, B., Jost, G., Pas, R.v.d.: Using OpenMP: Portable Shared Memory Parallel Programming (Scientific and Engineering Computation). MIT Press, Cambridge, MA (2007)
Dutot, P.F., Georgiou, Y., Glesser, D., Lefevre, L., Poquet, M., Rais, I.: Towards energy budget control in HPC. In: IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing, pp. 381–390. IEEE, Piscataway (2017)
Foster, I.: Designing and Building Parallel Programs: Concepts and Tools for Parallel Software Engineering. Addison-Wesley Longman Publishing, Boston (1995)
Gropp, W., Lusk, E., Skjellum, A.: Using MPI (2Nd Ed.): Portable Parallel Programming with the Message-passing Interface. MIT Press, Cambridge (1999)
Hennessy, J.L., Patterson, D.A.: Computer Architecture: A Quantitative Approach, 3rd edn. Morgan Kaufmann Publishers, San Francisco (2003)
Kahng, A.B., Kang, S., Rosing, T.S., Strong, R.: Many-core token-based adaptive power gating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(8), 1288–1292 (2013). https://doi.org/10.1109/TCAD.2013.2257923
Kaxiras, S., Martonosi, M.: Computer Architecture Techniques for Power-Efficiency, 1st edn. Morgan and Claypool Publishers (2008)
Keating, M., Flynn, D., Aitken, R., Gibbons, A., Shi, K.: Low Power Methodology Manual: For System-on-Chip Design. Springer, Berlin (2007)
Korthikanti, V.A., Agha, G.: Towards optimizing energy costs of algorithms for shared memory architectures. In: Proceedings of the 22nd Annual ACM Symposium on Parallelism in Algorithms and Architectures (SPAA 2010) Thira, Santorini, Greece, June 13–15, 2010, pp. 157–165 (2010). https://doi.org/10.1145/1810479.1810510
Le Sueur, E., Heiser, G.: Dynamic voltage and frequency scaling: the laws of diminishing returns. In: Proceedings of the 2010 International Conference on Power Aware Computing and Systems, HotPower’10, pp. 1–8. USENIX Association, Berkeley (2010)
Lungu, A., Bose, P., Buyuktosunoglu, A., Sorin, D.J.: Dynamic power gating with quality guarantees. In: Proceedings of the 2009 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED ’09, pp. 377–382. ACM, New York (2009). https://doi.org/10.1145/1594233.1594331
Madan, N., Buyuktosunoglu, A., Bose, P., Annavaram, M.: A case for guarded power gating for multi-core processors. In: 2011 IEEE 17th International Symposium on High Performance Computer Architecture, pp. 291–300 (2011). https://doi.org/10.1109/HPCA.2011.5749737
McCool, M., Reinders, J., Robison, A.: Structured Parallel Programming: Patterns for Efficient Computation, 1st edn. Morgan Kaufmann Publishers, San Francisco (2012)
Oboril, F., Tahoori, M.B.: Extratime: Modeling and analysis of wearout due to transistor aging at microarchitecture-level. In: IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2012), pp. 1–12 (2012). https://doi.org/10.1109/DSN.2012.6263957
OpenMP, A.: Openmp 4.0: specification (2013)
Patterson, D.A., Hennessy, J.L.: Computer Organization and Design, 5th edn. The Hardware/Software Interface, 5th edn. Morgan Kaufmann Publishers, San Francisco (2013)
Rauber, T., Rünger, G.: Parallel Programming: For Multicore and Cluster Systems, 2nd edn. Springer, Berlin (2013)
Rossi, F.D., Storch, M., de Oliveira, I., Rose, C.A.F.D.: Modeling power consumption for dvfs policies. In: 2015 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1879–1882. IEEE, Piscataway (2015). https://doi.org/10.1109/ISCAS.2015.7169024
Tanenbaum, A.S.: Modern Operating Systems, 3rd edn. Prentice Hall, Upper Saddle River (2007)
Author information
Authors and Affiliations
Rights and permissions
Copyright information
© 2019 The Author(s), under exclusive license to Springer Nature Switzerland AG
About this chapter
Cite this chapter
Lorenzon, A.F., Schneider Beck Filho, A.C. (2019). Fundamental Concepts. In: Parallel Computing Hits the Power Wall. SpringerBriefs in Computer Science. Springer, Cham. https://doi.org/10.1007/978-3-030-28719-1_2
Download citation
DOI: https://doi.org/10.1007/978-3-030-28719-1_2
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-030-28718-4
Online ISBN: 978-3-030-28719-1
eBook Packages: Computer ScienceComputer Science (R0)