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Cyclic Data Flows in Computers and Embedded Systems

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Part of the book series: Studies in Systems, Decision and Control ((SSDC,volume 241))

Abstract

Synchronous DataFlow Graphs (SDF in short) is a simple model of computation introduced for the description of Digital Signal Processing Applications. This formalism is today widely used to model embedded parallel applications. This chapter aims at presenting a panorama of theoretical results and practical applications in connection with cyclic scheduling problems. We first recall that the execution of a SDF can be seen as a set of cyclic dependant tasks. The structure of precedence constraints, important dominance properties and simplifications of the SDF are then presented. For the special case of uniform precedence graph, periodic schedule are dominant and the maximum throughput can be polynomially evaluated. Main results on the resource constrained problem are presented, followed by a more recent problem issued from sensor networks. In the general case, the existence of a polynomial-time algorithm to evaluate the maximum throughput of a SDF is a challenging question. However, the determination of a periodic schedule of minimum period is a polynomial problem, and many authors limit their study to this class of schedule to express optimization problems as the total buffer minimization or to evaluate the latency of a real-time periodic system.

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References

  1. Ahmad, A., Hanzálek, Z.: An energy efficient schedule for IEEE 802.15.4/zigbee cluster tree WSN with multiple collision domains and period crossing constraint. IEEE Trans. Ind. Inform. 14(1), 12–23 (2018)

    Article  Google Scholar 

  2. Alacaide, D., Chu, C., Kats, V., Levner, E., Sierksma, G.: Cyclic multiple robot scheduling with time-window constraints using a critical path approach. Eur. J. Oper. Res. 177, 147–162 (2007)

    Article  MathSciNet  Google Scholar 

  3. Ayala, M., Benabid, A., Artigues, C., Hanen, C.: The resource-constrained modulo scheduling problem: an experimental study. Comput. Optim. Appl. 54(3), 645–673 (2013)

    Article  MathSciNet  Google Scholar 

  4. Barroso, L.: The price of performance. ACM Queue 3(7), 48–53 (2005)

    Article  Google Scholar 

  5. Bekooij, M.J., Jansen, P.G., Smit, G.J., Wiggers, M.H.: Efficient computation of buffer capacities for cyclo-static real-time systems with back-pressure. In: 2007 44th ACM/IEEE Design Automation Conference, San Diego, CA, 4–8 June 2007, pp. 281–292. IEEE (2007)

    Google Scholar 

  6. Benabid, A., Hanen, C.: Worst case analysis of decomposed software pipelining for cyclic unitary RCPSP with precedence delays. J. Sched. 14(5), 511–522 (2011)

    Article  MathSciNet  Google Scholar 

  7. Benabid-Najjar, A., Hanen, C., Marchetti, O., Kordon, A.M.: Periodic schedules for bounded timed weighted event graphs. IEEE Trans. Autom. Control 57(5), 1222–1232 (2012)

    Article  MathSciNet  Google Scholar 

  8. Benazouz, M., Marchetti, O., Kordon, A.M., Urard, P.: A new approach for minimizing buffer capacities with throughput constraint for embedded system design. In: The 8th ACS/IEEE International Conference on Computer Systems and Applications, AICCSA 2010, Hammamet, Tunisia, 16–19 May 2010, pp. 1–8. IEEE (2010)

    Google Scholar 

  9. Benazouz, M., Marchetti, O., Munier-Kordon, A., Michel, T.: A new method for minimizing buffer sizes for cyclo-static dataflow graphs. In: 2010 8th IEEE Workshop on Embedded Systems for Real-Time Multimedia, Scottsdale, AZ, 2010, pp. 11–20. IEEE (2010)

    Google Scholar 

  10. Blachot, F., de Dinechin, B.D., Huard, G.: SCAN: a heuristic for near-optimal software pipelining. In: Nagel, W.E., Walter, W.V., Lehner, W. (eds.) Euro-Par 2006 Parallel Processing. Euro-Par 2006. Lecture Notes in Computer Science, vol 4128. Springer, Berlin (2006)

    Chapter  Google Scholar 

  11. Bodin, B., Kordon, A.M., de Dinechin, B.D.: K-periodic schedules for evaluating the maximum throughput of a synchronous dataflow graph. In: 2012 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS XII, Samos, Greece, 16–19 July 2012, pp. 152–159. IEEE (2012)

    Google Scholar 

  12. Bodin, B., Kordon, A.M., de Dinechin, B.D.: Optimal and fast throughput evaluation of CSDF. In: DAC ’16 Proceedings of the 53rd Annual Design Automation Conference, Austin, Texas, 5–9 June 2016, pp. 160:1–160:6. ACM, New York (2016)

    Google Scholar 

  13. Calland, P.Y., Darte, A., Robert, Y.: Circuit retiming applied to decomposed software pipelining. IEEE Trans. Parallel Distrib. Syst. 9(1), 24–35 (1998)

    Article  Google Scholar 

  14. Carlier, J., Chrétienne, P.: Problèmes d’ordonnancement: modèlisation, complexité, algorithmes. Masson, Paris (1988)

    Google Scholar 

  15. Claire, H.: Cyclic scheduling. In: Robert, Y., Vivien, F. (eds.) Introduction to Scheduling. Springer, Berlin (2009)

    Google Scholar 

  16. Cormen, T., Leiserson, C., Rivest, R.: Introduction to Algorithms. MIT Press, Cambridge (1990)

    Google Scholar 

  17. Darte, A., Huard, G.: Loop shifting for loop compaction. Int. J. Parallel Program. 28(499), 415–431 (2000)

    Google Scholar 

  18. Dasdan, A., Irani, S., Gupta, R.K.: Efficient algorithms for optimum cycle mean and optimum cost to time ratio problems. In: DAC ’99 Proceedings of the 36th Annual ACM/IEEE Design Automation Conference, New Orleans, Louisiana, USA, 21–25 June 1999, pp. 37–42. ACM, New York (1999)

    Google Scholar 

  19. Dupont De Dinechin, B., Artigues, C., Azem, S.: Resource-constrained moulo scheduling. In: Artigues, C., Demassey, S., Néron, E. (eds.) Resource Constrained Project Scheduling: Models, Algorithms, Extensions and Applications, Control Systems, Robotics and Manufacturing Series, pp. 267–277. ISTE-Wiley (2008)

    Google Scholar 

  20. Eichenberger, A., Davidson, E.: Efficient formulation for optimal modulo schedulers. In: ACM SIGPLAN Conference on Programming Language Design and Implementation, Las Vegas, Nevada, pp. 194–205 (1997)

    Article  Google Scholar 

  21. Gasperoni, F., Schwiegelshohn, U.: Generating close to optimum loop schedules on parallel processors. Parallel Process. Lett. 4, 391–403 (1994)

    Article  MathSciNet  Google Scholar 

  22. Goubier, T., Sirdey, R., Louise, S., David, V.: \(\Sigma {\text{c}}\): a programming model and language for embedded manycores. In: Xiang, Y., Cuzzocrea, A., Hobbs, M., Zhou, W. (eds.) Algorithms and Architectures for Parallel Processing — 11th International Conference, ICA3PP, Melbourne, Australia, 24–26 October 2011, pp. 385–394. Springer, Berlin (2011)

    Chapter  Google Scholar 

  23. Hanen, C., Hanzalek, Z.: Grouping tasks to save energy in a cyclic scheduling problem: a complexity study. HAL CCSD (2012)

    Google Scholar 

  24. Hanen, C., Munier, A.: Cyclic scheduling on parallel processors: an overview. In: Chrétienne, P., Coffman, E.G., Lenstra, J.K., Liu, Z. (eds.) Scheduling Theory and Its Applications. Wiley, New York (1994)

    Google Scholar 

  25. Hanen, C., Munier, A.: A study of the cyclic scheduling problem on parallel processors. Discret. Appl. Math. 57(2–3), 167–192 (1995)

    Article  MathSciNet  Google Scholar 

  26. Hanzálek, Z., Hanen, C.: The impact of core precedences in a cyclic RCPSP with precedence delays. J. Sched. 18(3), 275–284 (2015)

    Article  MathSciNet  Google Scholar 

  27. Kats, V., Levner, E.: Cyclic routing algorithms in graphs: performance analysis and applications to robot scheduling. Comput. Ind. Eng. 61(2), 279–288 (2011)

    Article  Google Scholar 

  28. Khatib, J., Kordon, A.M., Klikpo, E.C., Trabelsi-Colibet, K.: Computing latency of a real-time system modeled by synchronous dataflow graph. In: Proceedings of the 24th International Conference on Real-Time Networks and Systems, RTNS 2016, Brest, France, 19–21 October 2016, pp. 87–96. ACM, New York (2016)

    Google Scholar 

  29. Lee, E.A., Messerschmitt, D.G.: Synchronous data flow. Proc. IEEE 75(9), 1235–1245 (1987)

    Article  Google Scholar 

  30. Liu, C.L., Layland, J.W.: Scheduling algorithms for multiprogramming in a hard-real-time environment. J. ACM 20(1), 46–61 (1973)

    Article  MathSciNet  Google Scholar 

  31. Marchetti, O., Kordon, A.M.: Complexity results for weighted timed event graphs. Discret. Optim. 7(3), 166–180 (2010)

    Article  MathSciNet  Google Scholar 

  32. Marchetti, O., Munier-Kordon, A.: Cyclic scheduling for the synthesis of embedded systems. In: Robert, Y., Vivien, F. (eds.) Introduction to Scheduling. Springer, Berlin (2009)

    Google Scholar 

  33. Marchetti, O., Munier-Kordon, A.: A sufficient condition for the liveness of weighted event graphs. Eur. J. Oper. Res. 197(2), 532–540 (2009)

    Article  MathSciNet  Google Scholar 

  34. Munier, A.: Régime asymptotique optimal d’un graphe d’événements temporisé généralisé: application à un problème d’assemblage. RAIRO-Automatique Productique Informatique Industrielle 27(5), 487–513 (1993)

    MATH  Google Scholar 

  35. Munier-Kordon, A.: A graph-based analysis of the cyclic scheduling problem with time constraints: schedulability and periodicity of the earliest schedule. J. Sched. 14(1), 103–117 (2011)

    Article  MathSciNet  Google Scholar 

  36. Oh, H., Ha, S.: Efficient code synthesis from extended dataflow graphs for multimedia applications. In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, 10–14 June 2002, pp. 275–280. ACM, New York (2002)

    Google Scholar 

  37. Pempera, J., Smutnicki, C.: Open shop cyclic scheduling. Eur. J. Oper. Res. 269(2), 773–781 (2018)

    Article  MathSciNet  Google Scholar 

  38. Rau, B.R.: Iterative modulo scheduling: an algorithm for software pipelining loops. In: MICRO 27: Proceedings of the 27th Annual International Symposium on Microarchitecture, 30 November–2 December 1994, pp. 63–74. ACM, New York (1994)

    Google Scholar 

  39. Robert, Y., Vivien, F.: Introduction to Scheduling. Chapman and Hall/CRC Press, Boca Raton (2009)

    Google Scholar 

  40. Thies, W., Karczmarek, M., Gordon, M., Maze, D.Z., Wong, J., Hoffman, H., Brown, M., Amarasinghe, S.: StreamIt: a compiler for streaming applications. Technical report, Massachussetts Institute of Technology (2001)

    Google Scholar 

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Hanen, C., Munier-Kordon, A. (2020). Cyclic Data Flows in Computers and Embedded Systems. In: Bożejko, W., Bocewicz, G. (eds) Modelling and Performance Analysis of Cyclic Systems. Studies in Systems, Decision and Control, vol 241. Springer, Cham. https://doi.org/10.1007/978-3-030-27652-2_1

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  • DOI: https://doi.org/10.1007/978-3-030-27652-2_1

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