Abstract
This chapter explain the timing analysis techniques, tools for timing analysis, concept of design corners, challenges of on-chip variations in advanced technology nodes, and a few tips to address those challenges for achieving SOC timing closure.
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Static Timing Analysis for Nanometer Designs A Practical Approach, J. Bhasker • Rakesh Chadha
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Chakravarthi, V.S. (2020). Static Timing Analysis (STA). In: A Practical Approach to VLSI System on Chip (SoC) Design. Springer, Cham. https://doi.org/10.1007/978-3-030-23049-4_6
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DOI: https://doi.org/10.1007/978-3-030-23049-4_6
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Publisher Name: Springer, Cham
Print ISBN: 978-3-030-23048-7
Online ISBN: 978-3-030-23049-4
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