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Synthesis of Majority Expressions Through Primitive Function Manipulation

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Advanced Boolean Techniques

Abstract

Due to technology advancements and circuits miniaturization, the study of logic systems that can be applied to nanotechnology has been progressing steadily. Among the creation of nanoelectronic circuits the reversible and majority logic stand out. This paper proposes the MPC (Majority Primitives Combination) algorithm, used for majority logic synthesis. The algorithm receives a truth table as input and returns a majority function that covers the same set of minterms. The formulation of a valid output function is made with the combination of previously optimized functions. As cost criteria the algorithm searches for a function with the least number of levels, followed by the least number of gates, inverters, and gate inputs. In this paper it’s also presented a comparison between the MPC and the exact_mig, currently considered the best algorithm for majority synthesis. The exact_mig encodes the exact synthesis of majority functions using the number of levels and gates as cost criteria. The MPC considers two additional cost criteria, the number of inverters and the number of gate inputs, with the goal to further improve exact_mig results. Therefore, the MPC aims to synthesize functions with the same amount of levels and gates, but with less inverters and gate inputs. Tests have shown that both algorithms return optimal solutions for all functions with 3 input variables. For functions with 4 inputs, the MPC is able to further improve 66% functions and achieves equal results for 11%. For functions with 5 input variables, out of a sample of 1000 randomly generated functions, the MPC further improved 48% functions and achieved equal results for 11%.

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References

  1. Akers, S.B.: A truth table method for the synthesis of combinational logic. IRE Trans. Electron. Comput. 4, 604–615 (1961)

    Article  Google Scholar 

  2. Akers, S.B.: Synthesis of combinational logic using three-input majority gates. In: Proceedings of the Third Annual Symposium on Switching Circuit Theory and Logical Design, 1962. SWCT 1962, pp. 149–158. IEEE, Sri Lanka (1962)

    Google Scholar 

  3. Amarú, L., Gaillardon, P.E., De Micheli, G.: Majority-inverter graph: a novel data-structure and algorithms for efficient logic optimization. In: Proceedings of the 51st Annual Design Automation Conference, pp. 1–6. ACM, New York (2014)

    Google Scholar 

  4. Amaru, L., Gaillardon, P.E., Chattopadhyay, A., De Micheli, G.: A sound and complete axiomatization of majority-n logic. IEEE Trans. Comput. 65(9), 2889–2895 (2016)

    Article  MathSciNet  Google Scholar 

  5. Bertacco, V., Damiani, M.: The disjunctive decomposition of logic functions. In: International conference on Computer-aided design (ICCAD), pp. 78–82. IEEE, San Jose (1997)

    Google Scholar 

  6. Chattopadhyay, A., Amarú, L., Soeken, M., Gaillardon, P.E., De Micheli, G.: Notes on majority Boolean algebra. In: 2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL), pp. 50–55. IEEE, Sri Lanka (2016)

    Google Scholar 

  7. Chu, Z., Soeken, M., Xia, Y., De Micheli, G.: Functional decomposition using majority. In: Asia and South Pacific Design Automation Conference, pp. 676–681. IEEE, Jeju (2018)

    Google Scholar 

  8. Cohn, M., Lindaman, R.: Axiomatic majority-decision logic. IRE Trans. Electron Comput. (1), 17–21 (1961)

    Article  MathSciNet  Google Scholar 

  9. De Moura, L., Bjørner, N.: Z3: an efficient SMT solver. In: International Conference on Tools and Algorithms for the Construction and Analysis of Systems, pp. 337–340. Springer, New York (2008)

    Google Scholar 

  10. Karnaugh, M.: The map method for synthesis of combinational logic circuits. Trans. Am. Inst. Electr. Eng. Part I Commun. Electron. 72(5), 593–599 (1953)

    MathSciNet  Google Scholar 

  11. Lindaman, R.: A theorem for deriving majority-logic networks within an augmented Boolean algebra. IRE Trans. Electron. Comp. (3), 338–342 (1960)

    Article  MathSciNet  Google Scholar 

  12. Mishra, V.K., Thapliyal, H.: Heuristic based majority/minority logic synthesis for emerging technologies. In: 2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID), pp. 295–300. IEEE, Jeju (2017)

    Google Scholar 

  13. Sasao, T.: Switching Theory for Logic Synthesis, 1st edn. Springer Science & Business Media, Berlin (2012)

    MATH  Google Scholar 

  14. Sentovich, E.M., Singh, K.J., Lavagno, L., Moon, C., Murgai, R., Saldanha, A., Savoj, H., Stephan, P.R., Brayton, R.K., Sangiovanni-Vincentelli, A.: Sis: a system for sequential circuit synthesis. Tech. rep., EECS Department, University of California, CA (1992). http://www2.eecs.berkeley.edu/Pubs/TechRpts/1992/2010.html

    Google Scholar 

  15. Shannon, C.E.: The synthesis of two-terminal switching circuits. Bell Syst. Tech. J. 28(1), 59–98 (1949)

    Article  MathSciNet  Google Scholar 

  16. Soeken, M., Amaru, L.G., Gaillardon, P.E., De Micheli, G.: Exact synthesis of majority-inverter graphs and its applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(11), 1842–1855 (2017)

    Article  Google Scholar 

  17. Soeken, M., Haaswijk, W., Testa, E., Mishchenko, A., Amarù, L.G., Brayton, R.K., De Micheli, G.: Practical exact synthesis. In: 2018 Design, Automation and Test in Europe Conference and Exhibition (DATE), pp. 309–314. IEEE, Dresden (2018)

    Google Scholar 

  18. Walus, K., Schulhof, G., Jullien, G., Zhang, R., Wang, W.: Circuit design based on majority gates for applications with quantum-dot cellular automata. In: Conference Record of the Thirty-Eighth Asilomar Conference on Signals, Systems and Computers 2004, vol. 2, pp. 1354–1357. IEEE, Dresden (2004)

    Google Scholar 

  19. Wang, P., Niamat, M., Vemuru, S.: Minimal majority gate mapping of 4-variable functions for quantum cellular automata. In: 2011 11th IEEE Conference on Nanotechnology (IEEE-NANO), pp. 1307–1312. IEEE, Dresden (2011)

    Google Scholar 

  20. Wang, P., Niamat, M.Y., Vemuru, S.R., Alam, M., Killian, T.: Synthesis of majority/minority logic networks. IEEE Trans. Nanotechnol. 14(3), 473–483 (2015)

    Article  Google Scholar 

  21. Zhang, R., Walus, K., Wang, W., Jullien, G.A.: A method of majority logic reduction for quantum cellular automata. IEEE Trans. Nanotechnol. 3(4), 443–450 (2004)

    Article  Google Scholar 

  22. Zhang, R., Gupta, P., Jha, N.K.: Majority and minority network synthesis with application to QCA-, SET-, and TPL-based nanotechnologies. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(7), 1233–1245 (2007)

    Article  Google Scholar 

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Ferraz, E.C., de Lima Muniz, J., da Silva, A.C.R., Dueck, G.W. (2020). Synthesis of Majority Expressions Through Primitive Function Manipulation. In: Drechsler, R., Soeken, M. (eds) Advanced Boolean Techniques. Springer, Cham. https://doi.org/10.1007/978-3-030-20323-8_6

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  • DOI: https://doi.org/10.1007/978-3-030-20323-8_6

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