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Enhancement of ECG Signal by Minimizing Power Line Interference Using FPGA Based Adaptive Filter

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Abstract

Power line noise disturbs and masks important data of ECG signal and whenever electrodes are attached to the body surface or when an exterior power source such as the sinusoidal 50 Hz/60 Hz signal interferes with the Electrocardiogram (ECG) signal. Hence it is necessary to remove this power line noise with appropriate signal processing. This paper presents the architecture of an LMS based Adaptive filter to minimize the low frequency Power line noise from the ECG. The system architecture is implemented on FPGA using Spartan 3s400pq208-4 board and Xilinx System Generator (XSG) software. The signal under experiments is added with low frequency Power line noise and is retrieved from MIT_BIH database. Efficient removal of low frequency Power line noise is helpful for decision making systems for saving the life of a person. The research work has been carried out by using the adaptive filter on ECG signal to remove low frequency Power line noise with preventing ECG signal.

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Correspondence to A. M. Kasture or M. A. Deshmukh .

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Kasture, A.M., Deshmukh, M.A., Hallur, J.S., Narsale, D.P., Jadhav, A.A. (2020). Enhancement of ECG Signal by Minimizing Power Line Interference Using FPGA Based Adaptive Filter. In: Pawar, P., Ronge, B., Balasubramaniam, R., Vibhute, A., Apte, S. (eds) Techno-Societal 2018 . Springer, Cham. https://doi.org/10.1007/978-3-030-16848-3_16

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