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Machine Learning in Physical Verification, Mask Synthesis, and Physical Design

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Machine Learning in VLSI Computer-Aided Design

Abstract

Yield, turn-around time, and chip quality are always of significant concerns for VLSI designs. The performance and efficiency of key design steps such as physical design, mask synthesis, and physical verification are critical to guarantee fast design closure and manufacturability. Recent advances in machine learning provide various new opportunities and approaches to tackle these challenges. This chapter will discuss several applications of machine learning in the backend design flow and demonstrate its impacts to existing design automation methodology.

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Authors and Affiliations

  1. University of Texas at Austin, Austin, TX, USA

    Yibo Lin & David Z. Pan

Authors
  1. Yibo Lin
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  2. David Z. Pan
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Corresponding author

Correspondence to Yibo Lin .

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Editors and Affiliations

  1. Department of Electrical and Computer Engineering and Center for Cyber Physical Systems, Khalifa University, Abu Dhabi, United Arab Emirates

    Ibrahim (Abe) M. Elfadel

  2. Massachusetts Institute of Technology, Cambridge, MA, USA

    Duane S. Boning

  3. Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA

    Xin Li

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Lin, Y., Pan, D.Z. (2019). Machine Learning in Physical Verification, Mask Synthesis, and Physical Design. In: Elfadel, I., Boning, D., Li, X. (eds) Machine Learning in VLSI Computer-Aided Design. Springer, Cham. https://doi.org/10.1007/978-3-030-04666-8_4

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  • DOI: https://doi.org/10.1007/978-3-030-04666-8_4

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  • Online ISBN: 978-3-030-04666-8

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