Abstract
Developing hardware support for transport layer protocol processing is a very complex and demanding task. However, for optimal performance hardware acceleration can be required. To cope with this situation we present a high level design approach which targets the development of configurable and reusable components. Therefore we outline the integration of advanced tools for the development of controller systems into our design environment. This process is illustrated based on a TCP/IP header analysis and validation component for which initial performance results are presented. The development of these specialised components is embedded in an approach to develop flexible and configurable protocol engines that can be optimised for specific applications.
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© 2001 Springer Science+Business Media Dordrecht
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Benz, M., Overbeck, G.H., Feske, K., Grusa, J. (2001). Hardware/Software-Architecture and High Level Design Approach for Protocol Processing Acceleration. In: Merker, R., Schwarz, W. (eds) System Design Automation. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-6666-0_7
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DOI: https://doi.org/10.1007/978-1-4757-6666-0_7
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-4886-1
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