Abstract
This chapter describes a new, efficient analysis algorithm [111, 112] to derive tight bounds on the worst-case response time required for an application task executing on a heterogeneous distributed system. Tight performance bounds are essential to many co-synthesis algorithms [106, 26, 30]. Co-synthesis requires performance estimation techniques to select suitable hardware components and determine how different allocation and scheduling of processes can affect the system performance. The performance estimation algorithm needs to be efficient in order for the co-synthesis algorithm to quickly explore various architectures in a large design space. Given the computation time of the uninterrupted execution of processes, the allocation of processes, and the priority assignment for process scheduling, the goal of our analysis algorithm is to statically estimate the worst-case delay of a task.
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© 1996 Springer Science+Business Media New York
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Yen, TY., Wolf, W. (1996). Performance Analysis. In: Hardware-Software Co-Synthesis of Distributed Embedded Systems. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-5388-2_4
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DOI: https://doi.org/10.1007/978-1-4757-5388-2_4
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-5167-0
Online ISBN: 978-1-4757-5388-2
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