Abstract
This chapter describes the VLSI implementation of a flexible 100 GOPS (Giga Operations Per Second) exhaustive search segment-matching architecture to support evolving motion estimation algorithms, as well as block-matching algorithms of established video coding standards.
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Kuhn P., Stechele W.: “VLSI architecture for variable block size motion estimation with luminance correction”, vol. SPIE 3162 Advanced Signal Processing: Algorithms, Architectures and Implementations, San Diego, July 1997, pp. 497–508
Kuhn, P., Weisgerber, A., Poppenwimmer, R. Stechele, W.: “A flexible VLSI architecture for Variable Block Size Segment Matching with Luminance Correction”, ASAP 97, IEEE International Conference on Application-specific Systems, Architectures and Processors, Zurich, July 14–16, 1997
Kuhn P., Eiermann M., Stechele W.: “A flexible Segment Matching Processor for Motion and Illumination Estimation”, PCS 97, International Picture Coding Symposium, Berlin, Sept. 1997
Kuhn, P., Weisgerber A., Poppenwimmer R., Stechele W.: “Eine flexible Architektur für moderne Verfahren der Bewegungsschätzung”, 7. Dortmunder Femsehseminar, Dortmund, Sept. 1997 (in german].
Kuhn, P., Eiermann M., Weisgerber W., Poppenwimmer R., Stechele, W.:,,VLSI Implementation of Mean-Corrected Block-Matching Motion Estimation of Partial Quadtrees“, VLBV 97, Workshop for Very Low Bitrate Video Coding, Linköping, Sweden, July 1997
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© 1999 Springer Science+Business Media Dordrecht
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Kuhn, P. (1999). VLSI Implementation: Search Engine I (2D Array). In: Algorithms, Complexity Analysis and VLSI Architectures for MPEG-4 Motion Estimation. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-4474-3_7
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DOI: https://doi.org/10.1007/978-1-4757-4474-3_7
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-5088-8
Online ISBN: 978-1-4757-4474-3
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