Abstract
In this chapter we consider the problem of assisting designers in selecting cost-effective system-on-chip architectures for high-volume communications, automotive control, video processing, and consumer electronics products. Efficient solutions for such products, in terms of performance and power consumption, have traditionally been obtained by designing application-specific integrated circuits (ASICs) fully customized to the application’s requirements. However, with the recent advent of application-specific instruction-set processors (ASIPs or IPs), this scenario is rapidly changing [MiSa96]. An ASIP,or core, is a programmable processor whose architecture and instruction set are customized to specific classes of applications [Goos96]. Compared to general-purpose processors, the architectural specialization of an ASIP results in better area/performance and power/performance ratios.
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Jacome, M.F., López, J.C. (1998). Supporting Early System-Level Design Space Exploration in the Deep Submicron Era. In: López, J.C., Hermida, R., Geisselhardt, W. (eds) Advanced Techniques for Embedded Systems Design and Test. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-4419-4_2
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DOI: https://doi.org/10.1007/978-1-4757-4419-4_2
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