Abstract
Silicon technology now allows us to build chips consisting of tens of millions of transistors. This technology promises new levels of system integration onto a single chip, but also presents significant challenges to the chip designer. As a result, many ASIC developers and silicon vendors are re-examining their design methodologies, searching for ways to make effective use of the huge numbers of gates now available.
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© 1998 Springer Science+Business Media New York
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Keating, M., Bricaud, P. (1998). Introduction. In: Reuse Methodology Manual for System-on-a-Chip Designs. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-2887-3_1
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DOI: https://doi.org/10.1007/978-1-4757-2887-3_1
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4757-2889-7
Online ISBN: 978-1-4757-2887-3
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