Abstract
So far we saw how you can constrain your clocks and ports to specify the timing requirements for the design. However, even after setting these global requirements, designers would want to make certain exclusions for certain paths. This may be done to specify certain unique requirements on the paths or provide additional scope for leniency. Such constraints are referred to as timing exceptions. There are three kinds of timing exceptions:
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© 2013 Springer Science+Business Media New York
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Gangadharan, S., Churiwala, S. (2013). False Paths. In: Constraining Designs for Synthesis and Timing Analysis. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-3269-2_11
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DOI: https://doi.org/10.1007/978-1-4614-3269-2_11
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Publisher Name: Springer, New York, NY
Print ISBN: 978-1-4614-3268-5
Online ISBN: 978-1-4614-3269-2
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