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Field Programmable Logic and Application

14th International Conference, FPL 2004, Leuven, Belgium, August 30-September 1, 2004. Proceedings

  • Jürgen Becker
  • Marco Platzner
  • Serge Vernalde

Part of the Lecture Notes in Computer Science book series (LNCS, volume 3203)

Table of contents

  1. Front Matter
  2. Plenary Keynotes

  3. Organic and Biology Computing

    1. Anish Alex, Jonathan Rose, Ruth Isserlin-Weinberger, Christopher Hogue
      Pages 13-22
  4. Security and Cryptography 1

    1. Celia López-Ongil, Raul Sanchez-Reillo, Judith Liu-Jimenez, Fernando Casado, Leslie Sánchez, Luis Entrena
      Pages 43-53
  5. Platform Based Design

    1. Tero Rissa, Peter Y. K. Cheung, Wayne Luk
      Pages 54-63
    2. A. Bigot, F. Charpentier, H. Krupnova, I. Sans
      Pages 64-73
  6. Algorithms and Architectures

    1. François-Xavier Standaert, Sıddıka Berna Örs, Jean-Jacques Quisquater, Bart Preneel
      Pages 84-94
  7. Acceleration Application 1

    1. Maya Gokhale, Janette Frigo, Christine Ahrens, Justin L. Tripp, Ron Minnich
      Pages 95-104
    2. M. Yoshimi, Y. Osana, T. Fukushima, H. Amano
      Pages 105-114
  8. Architecture 1

    1. Frederick Furtek, Eugene Hogenauer, James Scheuermann
      Pages 125-134
    2. Mike Hutton, Jay Schleicher, David Lewis, Bruce Pedersen, Richard Yuan, Sinan Kaptanoglu et al.
      Pages 135-144
    3. A. Gayasen, K. Lee, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, T. Tuan
      Pages 145-157
  9. Physical Design 1

    1. Jason Anderson, Sudip Nag, Kamal Chaudhary, Sandor Kalman, Chari Madabhushi, Paul Cheng
      Pages 168-178
    2. A. Lodi, R. Giansante, C. Chiesa, L. Ciccarelli, F. Campi, M. Toma
      Pages 179-188
    3. Hongbing Fan, Yu-Liang Wu, Chak-Chung Cheung, Jiping Liu
      Pages 189-199
  10. Arithmetic 1

    1. Chun Te Ewe, Peter Y. K. Cheung, George A. Constantinides
      Pages 200-208
    2. Gustavo Sutter, Gery Bioul, Jean-Pierre Deschamps
      Pages 209-220
    3. Jérémie Detrey, Florent de Dinechin
      Pages 221-230
    4. Guerric Meurice de Dormale, Philippe Bulens, Jean-Jacques Quisquater
      Pages 231-240
  11. Multitasking

    1. Jesus Tabero, Julio Septién, Hortensia Mecha, Daniel Mozos
      Pages 241-250
  12. Circuit Technology

    1. Minoru Watanabe, Fuminori Kobayashi
      Pages 261-269
    2. D. Keymeulen, R. Zebulum, A. Stoica, V Duong, M. I. Ferguson
      Pages 270-278
  13. Memory 1

    1. Eduardo Picatoste-Olloqui, Francisco Cardells-Tormo, Jordi Sempere-Agullo, Atilà Herms-Berenguer
      Pages 279-288
  14. Network Processing

    1. David V. Schuehler, John W. Lockwood
      Pages 301-310
    2. Zachary K. Baker, Viktor K. Prasanna
      Pages 311-321
  15. Testing

    1. Nicola Campregher, Peter Y. K. Cheung, Milan Vasilko
      Pages 322-332
    2. A. Parreira, J. P. Teixeira, M. B. Santos
      Pages 333-343
  16. Applications

    1. C. J. Tavares, C. Bungardean, G. M. Matos, J. T. de Sousa
      Pages 344-353
    2. Peeter Ellervee, Jaan Raik, Valentin Tihhomirov, Kalle Tammemäe
      Pages 354-363
  17. Arithmetic 2

    1. Dong-U Lee, Oskar Mencer, David J. Pearce, Wayne Luk
      Pages 364-373
    2. Nalin Sidahao, George A. Constantinides, Peter Y. K. Cheung
      Pages 374-383
  18. Signal Processing 1

    1. Uwe Meyer-Bäse, Suhasini Rao, Javier Ramírez, Antonio García
      Pages 384-393
    2. C. -S. Bouganis, P. Y. K. Cheung, J. Ng, A. A. Bharath
      Pages 394-403
  19. Computational Models and Compiler

    1. Alexandra Poetter, Jesse Hunter, Cameron Patterson, Peter Athanas, Brent Nelson, Neil Steiner
      Pages 414-423
    2. Changchun Shi, James Hwang, Scott McMillan, Ann Root, Vinay Singh
      Pages 424-433
    3. Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis
      Pages 434-443
  20. Dynamic Reconfiguration 1

    1. Manish Handa, Ranga Vemuri
      Pages 444-453
    2. Michael Ullmann, Michael Hübner, Björn Grimm, Jürgen Becker
      Pages 454-463
    3. Hideharu Amano, Takeshi Inuo, Hirokazu Kami, Taro Fujii, Masayasu Suzuki
      Pages 464-473

About these proceedings

Keywords

Alignment Computer Java SoC algorithms cryptographic implementations field-programmable logic logic operating system optimization power-aware design reconfigurable computing reconfigurable logic system-on-chip systems level design

Editors and affiliations

  • Jürgen Becker
    • 1
  • Marco Platzner
    • 2
  • Serge Vernalde
    • 3
  1. 1.ITIV - Universitaet Karlsruhe (TH) 
  2. 2.University of Paderborn 
  3. 3.IMECLeuvenBelgium

Bibliographic information

  • DOI https://doi.org/10.1007/b99787
  • Copyright Information Springer-Verlag Berlin Heidelberg 2004
  • Publisher Name Springer, Berlin, Heidelberg
  • eBook Packages Springer Book Archive
  • Print ISBN 978-3-540-22989-6
  • Online ISBN 978-3-540-30117-2
  • Series Print ISSN 0302-9743
  • Series Online ISSN 1611-3349
  • Buy this book on publisher's site
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