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Verilog® Quickstart

A Practical Guide to Simulation and Synthesis in Verilog

  • Authors
  • James M. Lee

Part of the The International Series in Engineering and Computer Science book series (SECS, volume 667)

Table of contents

  1. Front Matter
    Pages i-xxi
  2. Pages 1-8
  3. Pages 19-32
  4. Pages 33-70
  5. Pages 71-85
  6. Pages 133-141
  7. Pages 143-149
  8. Pages 151-166
  9. Pages 167-198
  10. Pages 237-245
  11. Pages 247-279
  12. Back Matter
    Pages 281-324

About this book

Introduction

From a review of the Second Edition
'If you are new to the field and want to know what "all this Verilog stuff is about," you've found the golden goose. The text here is straight forward, complete, and example rich -mega-multi-kudos to the author James Lee. Though not as detailed as the Verilog reference guides from Cadence, it likewise doesn't suffer from the excessive abstractness those make you wade through. This is a quick and easy read, and will serve as a desktop reference for as long as Verilog lives. Best testimonial: I'm buying my fourth and fifth copies tonight (I've loaned out/lost two of my others).'
Zach Coombes, AMD

Keywords

Debugging Verilog design gold modeling state machine test bench test management

Bibliographic information

  • DOI https://doi.org/10.1007/b116593
  • Copyright Information Kluwer Academic Publishers 1999
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-0-7923-8515-8
  • Online ISBN 978-0-306-47048-6
  • Series Print ISSN 0893-3405
  • Buy this book on publisher's site
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