System Level Design Model with Reuse of System IP

  • Patrizia Cavalloro
  • Christophe Gendarme
  • Klaus Kronlöf
  • Jean Mermet
  • Jos van Sas
  • Kari Tiensyrjä
  • Nikolaos S. Voros

Table of contents

  1. Front Matter
    Pages i-viii
  2. Klaus Kronlöf
    Pages 1-4
  3. Klaus Kronlöf, Nikolaos S. Voros
    Pages 5-11
  4. Kari Tiensyrjä
    Pages 13-20
  5. Kari Tiensyrjä, Jean Mermet
    Pages 21-41
  6. Christophe Gendarme, Jos van Sas
    Pages 57-77
  7. Nikolaos S. Voros
    Pages 79-99
  8. Nikolaos S. Voros
    Pages 101-114
  9. Back Matter
    Pages 115-211

About this book

Introduction

This book presents the perspective of the SYDIC-Telecom project on system design and reuse as perceived in the course of the research during 1999 - 2003. The initial problem statement of the research was formulated as follows: "The current situation regarding system design in general is, that the methods are insufficient, informally practiced, and weakly supported by formal techniques and tools. Regarding system reuse the methods and tools for exchanging system design data and know-how within companies are ad hoc and insufficient. The means available inside companies being already insufficient, there are actually no ways of exchanging between companies. Therefore, there hardly exists any system IP (Intellectual Property) industry. Although system design know-how is one of companies' main assets, it cannot be reused and capitalised effectively enough today. There is a lack of rational design flows supporting a design methodology based on reuse of IP, and few design tools to support it. Even guidelines on how to use existing tools in the design flow for this purpose often do not exist." The problem was known to be hard and the scope broad. The plan of attack was first to analyse the state-of-the-art and the state-of-the-practice, then to identify potential improvements, and finally to synthesise a formalised proposal for implementation. The approach was applied to different system-level issues, e.g. design flows, terminology, languages, reuse, design process and object of design.

Keywords

Analysis Usability complex systems information integrated circuit micro-alloy transistor, MAT model organization semantics single-electron transistor static-induction transistor

Editors and affiliations

  • Patrizia Cavalloro
    • 1
  • Christophe Gendarme
    • 2
  • Klaus Kronlöf
    • 3
  • Jean Mermet
    • 4
  • Jos van Sas
    • 2
  • Kari Tiensyrjä
    • 5
  • Nikolaos S. Voros
    • 6
  1. 1.Itatel SpAMilanItaly
  2. 2.Alcatel BellAntwerpBelgium
  3. 3.Nokia Research CenterHelsinkiFinland
  4. 4.ECSIGrenobleFrance
  5. 5.VTT ElectronicsOuluFinland
  6. 6.INTRACOM S.A.PatrasGreece

Bibliographic information

  • DOI https://doi.org/10.1007/b105966
  • Copyright Information Springer Science + Business Media, Inc. 2003
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-1-4020-7594-0
  • Online ISBN 978-0-306-48733-0
  • About this book
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