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Fan-Out Wafer-Level Packaging

  • John H. Lau

Table of contents

  1. Front Matter
    Pages i-xx
  2. John H. Lau
    Pages 21-68
  3. John H. Lau
    Pages 115-125
  4. John H. Lau
    Pages 127-143
  5. John H. Lau
    Pages 145-194
  6. John H. Lau
    Pages 195-206
  7. John H. Lau
    Pages 207-216
  8. John H. Lau
    Pages 217-230
  9. John H. Lau
    Pages 231-268
  10. John H. Lau
    Pages 269-303

About this book

Introduction

This comprehensive guide to fan-out wafer-level packaging (FOWLP) technology compares FOWLP with flip chip and fan-in wafer-level packaging. It presents the current knowledge on these key enabling technologies for FOWLP, and discusses several packaging technologies for future trends. The Taiwan Semiconductor Manufacturing Company (TSMC) employed their InFO (integrated fan-out) technology in A10, the application processor for Apple’s iPhone, in 2016, generating great excitement about FOWLP technology throughout the semiconductor packaging community. For many practicing engineers and managers, as well as scientists and researchers, essential details of FOWLP – such as the temporary bonding and de-bonding of the carrier on a reconstituted wafer/panel, epoxy molding compound (EMC) dispensing, compression molding, Cu revealing, RDL fabrication, solder ball mounting, etc. – are not well understood.  

Intended to help readers learn the basics of problem-solving methods and understand the trade-offs inherent in making system-level decisions quickly, this book serves as a valuable reference guide for all those faced with the challenging problems created by the ever-increasing interest in FOWLP, helps to remove roadblocks, and accelerates the design, materials, process, and manufacturing development of key enabling technologies for FOWLP.

Keywords

Fan-Out Wafer-Level Packaging (FOWLP) Fan-out Panel-Level Packaging (FOPLP) Reconstituted carrier RDL (redistribution layer) – dielectric and conductor layers FOWLP with chip-first and die face-down FOWLP with chip-first and die face-up FOWLP with chip-last or RDL-first EMC (epoxy molding compound) Compression molding and PMC (post mold cure) Warpage and die shift Temporary bonding and de-bonding 3D IC heterogeneous integration by FOWLP FOWLP thermal management FOWLP reliability FOWLP technology

Authors and affiliations

  • John H. Lau
    • 1
  1. 1.ASM Pacific TechnologyHong KongHong Kong

Bibliographic information

  • DOI https://doi.org/10.1007/978-981-10-8884-1
  • Copyright Information Springer Nature Singapore Pte Ltd. 2018
  • Publisher Name Springer, Singapore
  • eBook Packages Engineering
  • Print ISBN 978-981-10-8883-4
  • Online ISBN 978-981-10-8884-1
  • Buy this book on publisher's site
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