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System-Level Synthesis

  • Ahmed A. Jerraya
  • Jean Mermet

Part of the NATO Science Series book series (NSSE, volume 357)

Table of contents

  1. Front Matter
    Pages i-viii
  2. Models for System-Level Synthesis

    1. Rolf Ernst
      Pages 1-43
    2. Luciano Lavagno, Alberto Sangiovanni-Vincentelli, Ellen Sentovich
      Pages 45-102
    3. A. A. Jerraya, M. Romdhani, Ph. Le Marrec, F. Hessel, P. Coste, C. Valderrama et al.
      Pages 103-136
    4. Carlos Delgado Kloos, Simon Pickin, Luis Sanchez, Angel Groba
      Pages 137-174
  3. Techniques for System-Level Synthesis

    1. Giovanni De Micheli, Luca Benini, Alessandro Bogliolo
      Pages 263-292
    2. Masaharu Imai, Yoshinori Takeuchi, Norimasa Ohtsuki, Nobuyuki Hikichi
      Pages 293-320
  4. Methodologies and Tools for System-Level Synthesis

    1. Daniel D. Gajski, Rainer Dömer, Jianwen Zhu
      Pages 321-358
    2. James Shin Young, Josh MacDonald, Michael Shilman, Abdallah Tabbara, Paul Hilfinger, A. Richard Newton
      Pages 359-396
    3. Ross B. Ortega, Luciano Lavagno, Gaetano Borriello
      Pages 397-432
  5. Back Matter
    Pages 433-435

About this book

Introduction

System-Level Synthesis deals with the concurrent design of electronic applications, including both hardware and software. The issue has become the bottleneck in the design of electronic systems, including both hardware and software, in several major industrial fields, including telecommunications, automotive and aerospace engineering. The major difficulty with the subject is that it demands contributions from several research fields, including system specification, system architecture, hardware design, and software design. Most existing book cover well only a few aspects of system-level synthesis. The present volume presents a comprehensive discussion of all the aspects of system-level synthesis. Each topic is covered by a contribution written by an international authority on the subject.

Keywords

Hardware Java algorithms architecture communication embedded systems integrated circuit metal-oxide-semiconductor transistor processor rapid prototyping telecommunications

Editors and affiliations

  • Ahmed A. Jerraya
    • 1
  • Jean Mermet
    • 1
    • 2
  1. 1.TIMA LaboratoryGrenobleFrance
  2. 2.ECSIGièresFrance

Bibliographic information

  • DOI https://doi.org/10.1007/978-94-011-4698-2
  • Copyright Information Kluwer Academic Publishers 1999
  • Publisher Name Springer, Dordrecht
  • eBook Packages Springer Book Archive
  • Print ISBN 978-0-7923-5749-0
  • Online ISBN 978-94-011-4698-2
  • Series Print ISSN 0168-132X
  • Buy this book on publisher's site
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