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Reliability of High Mobility SiGe Channel MOSFETs for Future CMOS Applications

  • Jacopo Franco
  • Ben Kaczer
  • Guido Groeseneken

Part of the Springer Series in Advanced Microelectronics book series (MICROELECTR., volume 47)

Table of contents

  1. Front Matter
    Pages i-xix
  2. Jacopo Franco, Ben Kaczer, Guido Groeseneken
    Pages 1-17
  3. Jacopo Franco, Ben Kaczer, Guido Groeseneken
    Pages 19-66
  4. Jacopo Franco, Ben Kaczer, Guido Groeseneken
    Pages 67-98
  5. Jacopo Franco, Ben Kaczer, Guido Groeseneken
    Pages 99-129
  6. Jacopo Franco, Ben Kaczer, Guido Groeseneken
    Pages 131-160
  7. Jacopo Franco, Ben Kaczer, Guido Groeseneken
    Pages 161-182
  8. Jacopo Franco, Ben Kaczer, Guido Groeseneken
    Pages 183-187

About this book

Introduction

Due to the ever increasing electric fields in scaled CMOS devices, reliability is becoming a showstopper for further scaled technology nodes. Although several groups have already demonstrated functional Si channel devices with aggressively scaled Equivalent Oxide Thickness (EOT) down to 5Å, a 10 year reliable device operation cannot be guaranteed anymore due to severe Negative Bias Temperature Instability.

This book focuses on the reliability of the novel (Si)Ge channel quantum well pMOSFET technology. This technology is being considered for possible implementation in next CMOS technology nodes, thanks to its benefit in terms of carrier mobility and device threshold voltage tuning. We observe that it also opens a degree of freedom for device reliability optimization. By properly tuning the device gate stack, sufficiently reliable ultra-thin EOT devices with a 10 years lifetime at operating conditions are demonstrated.

The extensive experimental datasets collected on a variety of processed 300mm wafers and presented here show the reliability improvement to be process- and architecture-independent and, as such, readily transferable to advanced device architectures as Tri-Gate (finFET) devices. We propose a physical model to understand the intrinsically superior reliability of the MOS system consisting of a Ge-based channel and a SiO2/HfO2 dielectric stack.

The improved reliability properties here discussed strongly support (Si)Ge technology as a clear frontrunner for future CMOS technology nodes.

Keywords

CMOS Technology Nodes Channel Hot Carriers Design Optimization Device Reliability Electron Device Reliability High-mobility channel pMOS Low Frequency Noise Nanoscale Devices Negative Bias Temperature Instability Random Telegraph Noise (RTN) Semiconductor Devices SiGe Gate Stack

Authors and affiliations

  • Jacopo Franco
    • 1
  • Ben Kaczer
    • 2
  • Guido Groeseneken
    • 3
  1. 1.IMECLeuvenBelgium
  2. 2.IMECLeuvenBelgium
  3. 3.IMECLeuvenBelgium

Bibliographic information

  • DOI https://doi.org/10.1007/978-94-007-7663-0
  • Copyright Information Springer Science+Business Media Dordrecht 2014
  • Publisher Name Springer, Dordrecht
  • eBook Packages Engineering
  • Print ISBN 978-94-007-7662-3
  • Online ISBN 978-94-007-7663-0
  • Series Print ISSN 1437-0387
  • Series Online ISSN 2197-6643
  • Buy this book on publisher's site
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