Overview
- Overview of the state-of-the-art testing techniques for high-speed serial links
- Analysis of clock and data recovery circuits’ characteristics and their effects on system performance
- Analysis of jitter characteristics and its measurement techniques
Part of the book series: Lecture Notes in Electrical Engineering (LNEE, volume 51)
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Table of contents (8 chapters)
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Front Matter
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Back Matter
Keywords
About this book
Efficient Test Methodologies for High-Speed Serial Links describes in detail several new and promising techniques for cost-effectively testing high-speed interfaces with a high test coverage. One primary focus of Efficient Test Methodologies for High-Speed Serial Links is on efficient testing methods for jitter and bit-error-rate (BER), which are widely used for quantifying the quality of a communication system. Various analysis as well as experimental results are presented to demonstrate the validity of the presented techniques.
Authors and Affiliations
Bibliographic Information
Book Title: Efficient Test Methodologies for High-Speed Serial Links
Authors: Dongwoo Hong, Kwang-Ting Cheng
Series Title: Lecture Notes in Electrical Engineering
DOI: https://doi.org/10.1007/978-90-481-3443-4
Publisher: Springer Dordrecht
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer Science+Business Media B.V. 2010
Hardcover ISBN: 978-90-481-3442-7Published: 07 December 2009
Softcover ISBN: 978-94-007-3094-6Published: 01 March 2012
eBook ISBN: 978-90-481-3443-4Published: 24 December 2009
Series ISSN: 1876-1100
Series E-ISSN: 1876-1119
Edition Number: 1
Number of Pages: XII, 98
Topics: Computer Engineering, Circuits and Systems, Register-Transfer-Level Implementation
Industry Sectors: Aerospace, Biotechnology, Electronics, Energy, Utilities & Environment, IT & Software, Telecommunications