VLSI Chip Design with the Hardware Description Language VERILOG

1. Front Matter

   Pages i-xiv

   PDF

2. Introduction

   1. Introduction

      • Ulrich Golze

      Pages 1-7

3. Design of VLSI Circuits

   1. Design of VLSI Circuits

      • Ulrich Golze

      Pages 9-23

4. RISC Architectures

   1. RISC Architectures

      • Ulrich Golze

      Pages 25-37

5. Short Introduction to VERILOG

   1. Short Introduction to VERILOG

      • Ulrich Golze

      Pages 39-46

6. External Specification of Behavior

   1. External Specification of Behavior

      • Ulrich Golze

      Pages 47-71

7. Internal Specification of Coarse Structure

   1. Internal Specification of Coarse Structure

      • Ulrich Golze

      Pages 73-112

8. Pipeline of the Coarse Structure Model

   1. Pipeline of the Coarse Structure Model

      • Ulrich Golze

      Pages 113-161

9. Synthesis of Gate Model

   1. Synthesis of Gate Model

      • Ulrich Golze

      Pages 163-203

10. Testing, Testability, Tester, and Testboard

    1. Testing, Testability, Tester, and Testboard

       • Ulrich Golze

       Pages 205-245

11. Summary and Prospect

    1. Summary and Prospect

       • Ulrich Golze

       Pages 247-255

12. HDL Models for Circuits and Architectures

    1. Front Matter

       Pages 259-259

       PDF

    2. HDL Modeling with VERILOG

       • Ulrich Golze

       Pages 261-346

13. Back Matter

    Pages 347-360

    PDF

The art of transforming a circuit idea into a chip has changed permanently. Formerly, the electrical, physical and geometrical tasks were predominant. Later, mainly net lists of gates had to be constructed. Nowadays, hardware description languages (HDL) similar to programming languages are central to digital circuit design. HDL-based design is the main subject of this book.
After emphasizing the economic importance of chip design as a key technology, the book deals with VLSI design (Very Large Scale Integration), the design of modern RISC processors, the hardware description language VERILOG, and typical modeling techniques. Numerous examples as well as a VERILOG training simulator are included on a disk.

• Hardware-Beschreibungssprachen
• Hardwarebeschreibungssprache
• LSI
• Mikroprozessoren
• RISC architectures
• RISC-Architekturen
• VLSI
• Verilog
• circuit
• circuit design
• hardware
• hardware description languages
• microprocessor
• programming
• programming language

• Department of Integrated Circuit Design (E.I.S.), Technical University of Braunschweig, Braunschweig, Germany

  Ulrich Golze

Policies and ethics