About this book
Introduction
This book is devoted to logic synthesis and design techniques for asynchronous circuits. It uses the mathematical theory of Petri Nets and asynchronous automata to develop practical algorithms implemented in a public domain CAD tool. Asynchronous circuits have so far been designed mostly by hand, and are thus much less common than their synchronous counterparts, which have enjoyed a high level of design automation since the mid-1970s. Asynchronous circuits, on the other hand, can be very useful to tackle clock distribution, modularity, power dissipation and electro-magnetic interference in digital integrated circuits. This book provides the foundation needed for CAD-assisted design of such circuits, and can also be used as the basis for a graduate course on logic design.
Keywords
Asynchronous circuits Boolean function Hardware Hazard-free logic synthesis Petri nets Timing diagrams Timing optimization algorithms automata integrated circuit logic petri net
Authors and affiliations
- J. Cortadella
- M. Kishinevsky
- A. Kondratyev
- L. Lavagno
- A. Yakovlev
- 1.Department of SoftwareUniversitat Politecnica de CatalunyaBarcelonaSpain
- 2.Intel CorporationHillsboroUSA
- 3.Cadence Design SystemsBerkeleyUSA
- 4.Dipartimento di ElettronicaPolitecnico di TorinoTorinoItaly
- 5.Department of Computing ScienceUniversity of Newcastle upon Tyne ClaremontNewcastle upon TyneUK
Bibliographic information