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Logic Synthesis for Asynchronous Controllers and Interfaces

  • J. Cortadella
  • M. Kishinevsky
  • A. Kondratyev
  • L. Lavagno
  • A. Yakovlev

Part of the Springer Series in Advanced Microelectronics book series (MICROELECTR., volume 8)

Table of contents

  1. Front Matter
    Pages I-XIII
  2. J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
    Pages 1-12
  3. J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
    Pages 13-27
  4. J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
    Pages 29-59
  5. J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
    Pages 61-86
  6. J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
    Pages 87-123
  7. J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
    Pages 125-165
  8. J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
    Pages 167-207
  9. J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
    Pages 209-244
  10. J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
    Pages 245-254
  11. J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
    Pages 255-255
  12. Back Matter
    Pages 257-273

About this book

Introduction

This book is devoted to logic synthesis and design techniques for asynchronous circuits. It uses the mathematical theory of Petri Nets and asynchronous automata to develop practical algorithms implemented in a public domain CAD tool. Asynchronous circuits have so far been designed mostly by hand, and are thus much less common than their synchronous counterparts, which have enjoyed a high level of design automation since the mid-1970s. Asynchronous circuits, on the other hand, can be very useful to tackle clock distribution, modularity, power dissipation and electro-magnetic interference in digital integrated circuits. This book provides the foundation needed for CAD-assisted design of such circuits, and can also be used as the basis for a graduate course on logic design.

Keywords

Asynchronous circuits Boolean function Hardware Hazard-free logic synthesis Petri nets Timing diagrams Timing optimization algorithms automata integrated circuit logic petri net

Authors and affiliations

  • J. Cortadella
    • 1
  • M. Kishinevsky
    • 2
  • A. Kondratyev
    • 3
  • L. Lavagno
    • 4
  • A. Yakovlev
    • 5
  1. 1.Department of SoftwareUniversitat Politecnica de CatalunyaBarcelonaSpain
  2. 2.Intel CorporationHillsboroUSA
  3. 3.Cadence Design SystemsBerkeleyUSA
  4. 4.Dipartimento di ElettronicaPolitecnico di TorinoTorinoItaly
  5. 5.Department of Computing ScienceUniversity of Newcastle upon Tyne ClaremontNewcastle upon TyneUK

Bibliographic information

  • DOI https://doi.org/10.1007/978-3-642-55989-1
  • Copyright Information Springer-Verlag Berlin Heidelberg 2002
  • Publisher Name Springer, Berlin, Heidelberg
  • eBook Packages Springer Book Archive
  • Print ISBN 978-3-642-62776-7
  • Online ISBN 978-3-642-55989-1
  • Series Print ISSN 1437-0387
  • Buy this book on publisher's site
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