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Advanced Gate Stacks for High-Mobility Semiconductors

  • Athanasios Dimoulas
  • Evgeni Gusev
  • Paul C. McIntyre
  • Marc Heyns

Part of the Advanced Microelectronics book series (MICROELECTR., volume 27)

Table of contents

  1. Front Matter
    Pages I-XXII
  2. S. Takagi
    Pages 1-19
  3. B. Ghyselen, I. Cayrefourcq, M. Kennard, F. Letertre, T. Akatsu, G. Celler et al.
    Pages 43-72
  4. S. R. Amy, Y. J. Chabal
    Pages 73-113
  5. S. J. Lee, C. Zhu, D. L. Kwong
    Pages 115-138
  6. C. J. Först, C. A. Ashman, K. Schwarz, P. E. Blöchl
    Pages 165-179
  7. S. Spiga, C. Wiemer, G. Scarel, G. Seguini, M. Fanciulli, A. Zenkevich et al.
    Pages 181-209
  8. A. Toriumi, K. Kita, M. Toyama, H. Nomura
    Pages 257-267
  9. C. O. Chui, K. C. Saraswat
    Pages 293-313
  10. H. Shang, E. P. Gusev, M. M. Frank, J. O. Chu, S. Bedell, M. Gribelyuk et al.
    Pages 315-332
  11. M. Meuris, B. De Jaeger, J. Van Steenbergen, R. Bonzom, M. Caymax, M. Houssa et al.
    Pages 333-340
  12. L. Pantisano, T. Conard, T. Scram, W. Deweerd, S. De Gendt, M. Heyns et al.
    Pages 363-374
  13. Back Matter
    Pages 375-383

About this book

Introduction

Will nanoelectronic devices continue to scale according to Moore’s law? At this moment, there is no easy answer since gate scaling is rapidly emerging as a serious roadblock for the evolution of CMOS technology. Channel engineering based on high-mobility semiconductor materials (e.g. strained Si, alternative orientation substrates, Ge or III-V compounds) could help overcome the obstacles since they offer performance enhancement. There are several concerns though. Do we know how to make complex engineered substrates (e.g. Germanium-on-Insulator)? Which are the best interface passivation methodologies and (high-k) gate dielectrics on Ge and III-V compounds? Can we process these materials in short channel transistors using flows, toolsets and know how similar to that in Si technology? How do these materials and devices behave at the nanoscale? The reader will get a clear view of what has been done so far, what is the state-of-the-art and which are the main challenges ahead before we come any close to a viable Ge and III-V MOS technology.

Keywords

CMOS Semiconductors Standard Transistors dielectric properties dielectrics electronics material microelectronics semiconductor semiconductor devices transistor

Editors and affiliations

  • Athanasios Dimoulas
    • 1
  • Evgeni Gusev
    • 2
    • 3
  • Paul C. McIntyre
    • 4
  • Marc Heyns
    • 5
    • 6
  1. 1.National Center for Scientific Research DEMOKRITOS, Patriarchou Grigoriou & NeapoleosAthensGreece
  2. 2.QUALCOMM Inc.SanDiegoUSA
  3. 3.QUALCOMM MEMS TechnologiesSanJoseUSA
  4. 4.Department for Materials ScienceStanford UniversityStanfordUSA
  5. 5.IMECLeuvenBelgium
  6. 6.MTM DepartmentKatholieke Universiteit LeuvenBelgium

Bibliographic information

  • DOI https://doi.org/10.1007/978-3-540-71491-0
  • Copyright Information Springer-Verlag Berlin Heidelberg 2007
  • Publisher Name Springer, Berlin, Heidelberg
  • eBook Packages Engineering
  • Print ISBN 978-3-540-71490-3
  • Online ISBN 978-3-540-71491-0
  • Series Print ISSN 1437-0387
  • Buy this book on publisher's site
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